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author | Yifei Jiang <jiangyifei@huawei.com> | 2022-01-12 16:13:23 +0800 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2022-01-21 15:52:56 +1000 |
commit | 2b650fbbcc2b5d34943bb5697d8799b2c1a885e1 (patch) | |
tree | 0dc8990b7f8e79dc9b006e5a54ef9deb02c6b960 /target/riscv/kvm_riscv.h | |
parent | ad40be27084536408b47a9209181f776ec2c54a5 (diff) | |
download | qemu-2b650fbbcc2b5d34943bb5697d8799b2c1a885e1.zip qemu-2b650fbbcc2b5d34943bb5697d8799b2c1a885e1.tar.gz qemu-2b650fbbcc2b5d34943bb5697d8799b2c1a885e1.tar.bz2 |
target/riscv: Support setting external interrupt by KVM
When KVM is enabled, set the S-mode external interrupt through
kvm_riscv_set_irq function.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Message-id: 20220112081329.1835-8-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/kvm_riscv.h')
-rw-r--r-- | target/riscv/kvm_riscv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h index f38c82b..ed281bd 100644 --- a/target/riscv/kvm_riscv.h +++ b/target/riscv/kvm_riscv.h @@ -20,5 +20,6 @@ #define QEMU_KVM_RISCV_H void kvm_riscv_reset_vcpu(RISCVCPU *cpu); +void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level); #endif |