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| author | Frank Chang <frank.chang@sifive.com> | 2021-12-10 15:56:22 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-12-20 14:51:36 +1000 |
| commit | dedc53cbc9f267e2ad037218ab07f9b4097efa65 (patch) | |
| tree | b5105b44233c83a63bca8de0b92b3fee1bafdba4 /target/riscv/insn32.decode | |
| parent | 50bfb45b2c5bbbac8ffb7f051eb8c88128cae88d (diff) | |
| download | qemu-dedc53cbc9f267e2ad037218ab07f9b4097efa65.zip qemu-dedc53cbc9f267e2ad037218ab07f9b4097efa65.tar.gz qemu-dedc53cbc9f267e2ad037218ab07f9b4097efa65.tar.bz2 | |
target/riscv: rvv-1.0: integer scalar move instructions
* Remove "vmv.s.x: dothing if rs1 == 0" constraint.
* Add vmv.x.s instruction.
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-37-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/insn32.decode')
| -rw-r--r-- | target/riscv/insn32.decode | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 4653a96..e33ec82 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -634,8 +634,9 @@ vmsif_m 010100 . ..... 00011 010 ..... 1010111 @r2_vm vmsof_m 010100 . ..... 00010 010 ..... 1010111 @r2_vm viota_m 010100 . ..... 10000 010 ..... 1010111 @r2_vm vid_v 010100 . 00000 10001 010 ..... 1010111 @r1_vm +vmv_x_s 010000 1 ..... 00000 010 ..... 1010111 @r2rd +vmv_s_x 010000 1 00000 ..... 110 ..... 1010111 @r2 vext_x_v 001100 1 ..... ..... 010 ..... 1010111 @r -vmv_s_x 001101 1 00000 ..... 110 ..... 1010111 @r2 vfmv_f_s 001100 1 ..... 00000 001 ..... 1010111 @r2rd vfmv_s_f 001101 1 00000 ..... 101 ..... 1010111 @r2 vslideup_vx 001110 . ..... ..... 100 ..... 1010111 @r_vm |