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author | Bin Meng <bmeng@tinylab.org> | 2023-02-28 18:40:27 +0800 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-03-01 16:40:19 -0800 |
commit | a1f0083c6e3eee2d80e712e8a03abd70b25df097 (patch) | |
tree | 6060c4e0f8280961d829acd4aa0d8625108ad38c /target/riscv/gdbstub.c | |
parent | 04733fb0916f4b2b240da42342374b05d5dfc389 (diff) | |
download | qemu-a1f0083c6e3eee2d80e712e8a03abd70b25df097.zip qemu-a1f0083c6e3eee2d80e712e8a03abd70b25df097.tar.gz qemu-a1f0083c6e3eee2d80e712e8a03abd70b25df097.tar.bz2 |
target/riscv: gdbstub: Turn on debugger mode before calling CSR predicate()
Since commit 94452ac4cf26 ("target/riscv: remove fflags, frm, and fcsr from riscv-*-fpu.xml")
the 3 FPU CSRs are removed from the XML target decription. The
original intent of that commit was based on the assumption that
the 3 FPU CSRs will show up in the riscv-csr.xml so the ones in
riscv-*-fpu.xml are redundant. But unforuantely that is not true.
As the FPU CSR predicate() has a run-time check on MSTATUS.FS,
at the time when CSR XML is generated MSTATUS.FS is unset, hence
no FPU CSRs will be reported.
The FPU CSR predicate() already considered such a case of being
accessed by a debugger. All we need to do is to turn on debugger
mode before calling predicate().
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-ID: <20230228104035.1879882-12-bmeng@tinylab.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'target/riscv/gdbstub.c')
-rw-r--r-- | target/riscv/gdbstub.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 294f0ce..ef52f41 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -280,6 +280,10 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg) int bitsize = 16 << env->misa_mxl_max; int i; +#if !defined(CONFIG_USER_ONLY) + env->debugger = true; +#endif + /* Until gdb knows about 128-bit registers */ if (bitsize > 64) { bitsize = 64; @@ -308,6 +312,11 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg) g_string_append_printf(s, "</feature>"); cpu->dyn_csr_xml = g_string_free(s, false); + +#if !defined(CONFIG_USER_ONLY) + env->debugger = false; +#endif + return CSR_TABLE_SIZE; } |