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| author | Kito Cheng <kito.cheng@sifive.com> | 2021-12-10 15:43:24 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-12-20 14:51:36 +1000 |
| commit | 6bc6fc96d1c9628c4c3514d277e541429e5b0b80 (patch) | |
| tree | cc49bdbaee7b4b1bff848126fe0d52638db792f5 /target/riscv/fpu_helper.c | |
| parent | 11f9c450a6772c095c5f9c40f5a08c2f8d15a9a1 (diff) | |
| download | qemu-6bc6fc96d1c9628c4c3514d277e541429e5b0b80.zip qemu-6bc6fc96d1c9628c4c3514d277e541429e5b0b80.tar.gz qemu-6bc6fc96d1c9628c4c3514d277e541429e5b0b80.tar.bz2 | |
target/riscv: zfh: half-precision floating-point classify
Signed-off-by: Kito Cheng <kito.cheng@sifive.com>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20211210074329.5775-6-frank.chang@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/fpu_helper.c')
| -rw-r--r-- | target/riscv/fpu_helper.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index ec2009e..388e23c 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -482,6 +482,12 @@ target_ulong helper_feq_h(CPURISCVState *env, uint64_t rs1, uint64_t rs2) return float16_eq_quiet(frs1, frs2, &env->fp_status); } +target_ulong helper_fclass_h(uint64_t rs1) +{ + float16 frs1 = check_nanbox_h(rs1); + return fclass_h(frs1); +} + target_ulong helper_fcvt_w_h(CPURISCVState *env, uint64_t rs1) { float16 frs1 = check_nanbox_h(rs1); |