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author | Michael Clark <mjc@sifive.com> | 2018-03-03 01:31:11 +1300 |
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committer | Michael Clark <mjc@sifive.com> | 2018-03-07 08:30:28 +1300 |
commit | 47ae93cdfedc683c56e19113d516d7ce4971c8e6 (patch) | |
tree | 713240f8392d981ec9b11893d603475f7a5dcfa5 /target/riscv/cpu_user.h | |
parent | 65c5b75c38b3e56650fc63674039108697096f75 (diff) | |
download | qemu-47ae93cdfedc683c56e19113d516d7ce4971c8e6.zip qemu-47ae93cdfedc683c56e19113d516d7ce4971c8e6.tar.gz qemu-47ae93cdfedc683c56e19113d516d7ce4971c8e6.tar.bz2 |
RISC-V Linux User Emulation
Implementation of linux user emulation for RISC-V.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Signed-off-by: Michael Clark <mjc@sifive.com>
Diffstat (limited to 'target/riscv/cpu_user.h')
-rw-r--r-- | target/riscv/cpu_user.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/target/riscv/cpu_user.h b/target/riscv/cpu_user.h new file mode 100644 index 0000000..c219961 --- /dev/null +++ b/target/riscv/cpu_user.h @@ -0,0 +1,13 @@ +#define xRA 1 /* return address (aka link register) */ +#define xSP 2 /* stack pointer */ +#define xGP 3 /* global pointer */ +#define xTP 4 /* thread pointer */ + +#define xA0 10 /* gpr[10-17] are syscall arguments */ +#define xA1 11 +#define xA2 12 +#define xA3 13 +#define xA4 14 +#define xA5 15 +#define xA6 16 +#define xA7 17 /* syscall number goes here */ |