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| author | Andrew Bresticker <abrestic@rivosinc.com> | 2022-05-31 17:05:44 -0400 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-06-10 09:31:42 +1000 |
| commit | 8f42415fc1d1bb462f2001bf5e2ad3b78f14b2e3 (patch) | |
| tree | ce324aa7b30eb2a0d9688d07787483229c2781cc /target/riscv/cpu.h | |
| parent | af9751316e53cdf7e98131afe6928a5f4445fe16 (diff) | |
| download | qemu-8f42415fc1d1bb462f2001bf5e2ad3b78f14b2e3.zip qemu-8f42415fc1d1bb462f2001bf5e2ad3b78f14b2e3.tar.gz qemu-8f42415fc1d1bb462f2001bf5e2ad3b78f14b2e3.tar.bz2 | |
target/riscv: Wake on VS-level external interrupts
Whether or not VSEIP is pending isn't reflected in env->mip and must
instead be determined from hstatus.vgein and hgeip. As a result a
CPU in WFI won't wake on a VSEIP, which violates the WFI behavior as
specified in the privileged ISA. Just use riscv_cpu_all_pending()
instead, which already accounts for VSEIP.
Signed-off-by: Andrew Bresticker <abrestic@rivosinc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220531210544.181322-1-abrestic@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu.h')
| -rw-r--r-- | target/riscv/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 890d33c..194a58d 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -489,6 +489,7 @@ int riscv_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int riscv_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); int riscv_cpu_hviprio_index2irq(int index, int *out_irq, int *out_rdzero); uint8_t riscv_cpu_default_priority(int irq); +uint64_t riscv_cpu_all_pending(CPURISCVState *env); int riscv_cpu_mirq_pending(CPURISCVState *env); int riscv_cpu_sirq_pending(CPURISCVState *env); int riscv_cpu_vsirq_pending(CPURISCVState *env); |