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authorAlistair Francis <alistair.francis@wdc.com>2022-09-14 12:11:06 +0200
committerAlistair Francis <alistair@alistair23.me>2022-09-27 07:04:38 +1000
commit277b210dd86636cc910bf6cd9a5477d01a10603f (patch)
tree89d327e0332c45272ba5d97fdba033af1386f9ec /target/riscv/cpu.h
parent4c0f0b6619126637e802f07c9fe8e9fffbc1c4bb (diff)
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target/riscv: Set the CPU resetvec directly
Instead of using our properties to set a config value which then might be used to set the resetvec (depending on your timing), let's instead just set the resetvec directly in the env struct. This allows us to set the reset vec from the command line with: -global driver=riscv.hart_array,property=resetvec,value=0x20000400 Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220914101108.82571-2-alistair.francis@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu.h')
-rw-r--r--target/riscv/cpu.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 06751e1..22344a6 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -190,7 +190,7 @@ struct CPUArchState {
/* This contains QEMU specific information about the virt state. */
target_ulong virt;
target_ulong geilen;
- target_ulong resetvec;
+ uint64_t resetvec;
target_ulong mhartid;
/*
@@ -474,7 +474,6 @@ struct RISCVCPUConfig {
bool pmp;
bool epmp;
bool debug;
- uint64_t resetvec;
bool short_isa_string;
};