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| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-05-31 11:07:32 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-06-10 09:31:42 +1000 |
| commit | de799beba7f927b2a1ed38128309316511311605 (patch) | |
| tree | e79a7d2de4039425364d0c5eede9a9d653e7d161 /target/riscv/cpu.h | |
| parent | efe1592c43fe9b4053bf2987581a05736062a3cd (diff) | |
| download | qemu-de799beba7f927b2a1ed38128309316511311605.zip qemu-de799beba7f927b2a1ed38128309316511311605.tar.gz qemu-de799beba7f927b2a1ed38128309316511311605.tar.bz2 | |
target/riscv: add support for zmmul extension v0.1
Add support for the zmmul extension v0.1. This extension includes all
multiplication operations from the M extension but not the divide ops.
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220531030732.3850-1-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'target/riscv/cpu.h')
| -rw-r--r-- | target/riscv/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index f08c3e8..890d33c 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -411,6 +411,7 @@ struct RISCVCPUConfig { bool ext_zhinxmin; bool ext_zve32f; bool ext_zve64f; + bool ext_zmmul; uint32_t mvendorid; uint64_t marchid; |