diff options
| author | Alistair Francis <alistair.francis@wdc.com> | 2021-09-02 10:40:10 +1000 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2021-09-21 07:56:49 +1000 |
| commit | a44da25aa69a7a3588a33607a8067c87b3b5a68e (patch) | |
| tree | 5ec25b06ff0a6dd4a5633bfa09559fd835a9423a /target/riscv/cpu.c | |
| parent | 326ff8dd09556fc2e257196c49f35009700794ac (diff) | |
| download | qemu-a44da25aa69a7a3588a33607a8067c87b3b5a68e.zip qemu-a44da25aa69a7a3588a33607a8067c87b3b5a68e.tar.gz qemu-a44da25aa69a7a3588a33607a8067c87b3b5a68e.tar.bz2 | |
target/riscv: Update the ePMP CSR address
Update the ePMP CSRs to match the 0.9.3 ePMP spec
https://github.com/riscv/riscv-tee/blob/61455747230a26002d741f64879dd78cc9689323/Smepmp/Smepmp.pdf
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 28c908de60b9b04fa20e63d113885c98586053f3.1630543194.git.alistair.francis@wdc.com
Diffstat (limited to 'target/riscv/cpu.c')
| -rw-r--r-- | target/riscv/cpu.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 13575c1..d4d5961 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -599,6 +599,7 @@ static Property riscv_cpu_properties[] = { DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64), DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true), DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true), + /* ePMP 0.9.3 */ DEFINE_PROP_BOOL("x-epmp", RISCVCPU, cfg.epmp, false), DEFINE_PROP_UINT64("resetvec", RISCVCPU, cfg.resetvec, DEFAULT_RSTVEC), |