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| author | Matheus Ferst <matheus.ferst@eldorado.org.br> | 2022-06-27 11:11:00 -0300 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-07-18 13:59:43 -0300 |
| commit | efb23674d13f9985510e85f72b1b65a42c367941 (patch) | |
| tree | cd15eb46e88279c7d3e106ee4dc9f5aff126a27a /target/ppc | |
| parent | 1315eed69d4810ae297f737b44ee8b63f6589190 (diff) | |
| download | qemu-efb23674d13f9985510e85f72b1b65a42c367941.zip qemu-efb23674d13f9985510e85f72b1b65a42c367941.tar.gz qemu-efb23674d13f9985510e85f72b1b65a42c367941.tar.bz2 | |
target/ppc: fix exception error value in slbfee
Testing on a POWER9 DD2.3, we observed that the Linux kernel delivers a
signal with si_code ILL_PRVOPC (5) when a userspace application tries to
use slbfee. To obtain this behavior on linux-user, we should use
POWERPC_EXCP_PRIV with POWERPC_EXCP_PRIV_OPC.
No functional change is intended for softmmu targets as
gen_hvpriv_exception uses the same 'exception' argument
(POWERPC_EXCP_HV_EMU) for raise_exception_*, and the powerpc_excp_*
methods do not use lower bits of the exception error code when handling
POWERPC_EXCP_{INVAL,PRIV}.
Reported-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220627141104.669152-3-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc')
| -rw-r--r-- | target/ppc/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 55f34eb..d7e5670 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -5386,12 +5386,12 @@ static void gen_slbmfev(DisasContext *ctx) static void gen_slbfee_(DisasContext *ctx) { #if defined(CONFIG_USER_ONLY) - gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); + gen_hvpriv_exception(ctx, POWERPC_EXCP_PRIV_OPC); #else TCGLabel *l1, *l2; if (unlikely(ctx->pr)) { - gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); + gen_hvpriv_exception(ctx, POWERPC_EXCP_PRIV_OPC); return; } gen_helper_find_slb_vsid(cpu_gpr[rS(ctx->opcode)], cpu_env, |