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author | Víctor Colombo <victor.colombo@eldorado.org.br> | 2022-03-02 06:51:37 +0100 |
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committer | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:37 +0100 |
commit | 536f9876e25a805be228d9c215e0c4c8e217a39b (patch) | |
tree | 9c55e4f867610cfc1b817713083f3c44c3d40e5c /target/ppc | |
parent | 5476ef1d40e77b1b556b59a1788a7b1142a0368e (diff) | |
download | qemu-536f9876e25a805be228d9c215e0c4c8e217a39b.zip qemu-536f9876e25a805be228d9c215e0c4c8e217a39b.tar.gz qemu-536f9876e25a805be228d9c215e0c4c8e217a39b.tar.bz2 |
target/ppc: Implement vmsumudm instruction
Based on [1] by Lijun Pan <ljp@linux.ibm.com>, which was never merged
into master.
[1]: https://lists.gnu.org/archive/html/qemu-ppc/2020-07/msg00419.html
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220225210936.1749575-7-matheus.ferst@eldorado.org.br>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc')
-rw-r--r-- | target/ppc/insn32.decode | 1 | ||||
-rw-r--r-- | target/ppc/translate/vmx-impl.c.inc | 34 |
2 files changed, 35 insertions, 0 deletions
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e85a75d..732a2bb 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -471,6 +471,7 @@ VMULLD 000100 ..... ..... ..... 00111001001 @VX ## Vector Multiply-Sum Instructions VMSUMCUD 000100 ..... ..... ..... ..... 010111 @VA +VMSUMUDM 000100 ..... ..... ..... ..... 100011 @VA # VSX Load/Store Instructions diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 4f528dc..fcff341 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -2081,6 +2081,40 @@ static bool trans_VPEXTD(DisasContext *ctx, arg_VX *a) return true; } +static bool trans_VMSUMUDM(DisasContext *ctx, arg_VA *a) +{ + TCGv_i64 rl, rh, src1, src2; + int dw; + + REQUIRE_INSNS_FLAGS2(ctx, ISA300); + REQUIRE_VECTOR(ctx); + + rh = tcg_temp_new_i64(); + rl = tcg_temp_new_i64(); + src1 = tcg_temp_new_i64(); + src2 = tcg_temp_new_i64(); + + get_avr64(rl, a->rc, false); + get_avr64(rh, a->rc, true); + + for (dw = 0; dw < 2; dw++) { + get_avr64(src1, a->vra, dw); + get_avr64(src2, a->vrb, dw); + tcg_gen_mulu2_i64(src1, src2, src1, src2); + tcg_gen_add2_i64(rl, rh, rl, rh, src1, src2); + } + + set_avr64(a->vrt, rl, false); + set_avr64(a->vrt, rh, true); + + tcg_temp_free_i64(rl); + tcg_temp_free_i64(rh); + tcg_temp_free_i64(src1); + tcg_temp_free_i64(src2); + + return true; +} + static bool trans_VMSUMCUD(DisasContext *ctx, arg_VA *a) { TCGv_i64 tmp0, tmp1, prod1h, prod1l, prod0h, prod0l, zero; |