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author | Víctor Colombo <victor.colombo@eldorado.org.br> | 2022-06-29 13:28:58 -0300 |
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committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-07-06 10:22:38 -0300 |
commit | f80d04d548d97fbbf5d4084dcc7d59a9bba387ef (patch) | |
tree | 76ce64abe4144db00e2e67c86f4d6c9265586167 /target/ppc/translate/fp-impl.c.inc | |
parent | 3e5bce70efe6bd1f684efbb21fd2a316cbf0657e (diff) | |
download | qemu-f80d04d548d97fbbf5d4084dcc7d59a9bba387ef.zip qemu-f80d04d548d97fbbf5d4084dcc7d59a9bba387ef.tar.gz qemu-f80d04d548d97fbbf5d4084dcc7d59a9bba387ef.tar.bz2 |
target/ppc: Move mffs[.] to decodetree
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20220629162904.105060-6-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/translate/fp-impl.c.inc')
-rw-r--r-- | target/ppc/translate/fp-impl.c.inc | 35 |
1 files changed, 17 insertions, 18 deletions
diff --git a/target/ppc/translate/fp-impl.c.inc b/target/ppc/translate/fp-impl.c.inc index 4f4d57c..d623135 100644 --- a/target/ppc/translate/fp-impl.c.inc +++ b/target/ppc/translate/fp-impl.c.inc @@ -615,24 +615,6 @@ static void gen_mcrfs(DisasContext *ctx) tcg_temp_free_i64(tnew_fpscr); } -/* mffs */ -static void gen_mffs(DisasContext *ctx) -{ - TCGv_i64 t0; - if (unlikely(!ctx->fpu_enabled)) { - gen_exception(ctx, POWERPC_EXCP_FPU); - return; - } - t0 = tcg_temp_new_i64(); - gen_reset_fpstatus(); - tcg_gen_extu_tl_i64(t0, cpu_fpscr); - set_fpr(rD(ctx->opcode), t0); - if (unlikely(Rc(ctx->opcode))) { - gen_set_cr1_from_fpscr(ctx); - } - tcg_temp_free_i64(t0); -} - static TCGv_i64 place_from_fpscr(int rt, uint64_t mask) { TCGv_i64 fpscr = tcg_temp_new_i64(); @@ -660,6 +642,23 @@ static void store_fpscr_masked(TCGv_i64 fpscr, uint64_t clear_mask, tcg_temp_free_i64(fpscr_masked); } +static bool trans_MFFS(DisasContext *ctx, arg_X_t_rc *a) +{ + TCGv_i64 fpscr; + + REQUIRE_FPU(ctx); + + gen_reset_fpstatus(); + fpscr = place_from_fpscr(a->rt, UINT64_MAX); + if (a->rc) { + gen_set_cr1_from_fpscr(ctx); + } + + tcg_temp_free_i64(fpscr); + + return true; +} + static bool trans_MFFSCE(DisasContext *ctx, arg_X_t *a) { TCGv_i64 fpscr; |