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| author | Daniel Henrique Barboza <danielhb413@gmail.com> | 2021-10-17 22:01:19 -0300 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-10-21 11:42:47 +1100 |
| commit | f7460df27162d1643f74677d53fad4328142c6a9 (patch) | |
| tree | 4ad9ae258c42aad2432137ca098fff234a63c8e3 /target/ppc/translate.c | |
| parent | 6fa5726be6a52b246335cb86a3c118cdfd40c677 (diff) | |
| download | qemu-f7460df27162d1643f74677d53fad4328142c6a9.zip qemu-f7460df27162d1643f74677d53fad4328142c6a9.tar.gz qemu-f7460df27162d1643f74677d53fad4328142c6a9.tar.bz2 | |
target/ppc: add MMCR0 PMCC bits to hflags
We're going to add PMU support for TCG PPC64 chips, based on IBM POWER8+
emulation and following PowerISA v3.1. This requires several PMU related
registers to be exposed to userspace (problem state). PowerISA v3.1
dictates that the PMCC bits of the MMCR0 register controls the level of
access of the PMU registers to problem state.
This patch start things off by exposing both PMCC bits to hflags,
allowing us to access them via DisasContext in the read/write callbacks
that we're going to add next.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20211018010133.315842-2-danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate.c')
| -rw-r--r-- | target/ppc/translate.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d0d400c..a4c5ef3 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -175,6 +175,8 @@ struct DisasContext { bool tm_enabled; bool gtse; bool hr; + bool mmcr0_pmcc0; + bool mmcr0_pmcc1; ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */ int singlestep_enabled; uint32_t flags; @@ -8552,6 +8554,8 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->tm_enabled = (hflags >> HFLAGS_TM) & 1; ctx->gtse = (hflags >> HFLAGS_GTSE) & 1; ctx->hr = (hflags >> HFLAGS_HR) & 1; + ctx->mmcr0_pmcc0 = (hflags >> HFLAGS_PMCC0) & 1; + ctx->mmcr0_pmcc1 = (hflags >> HFLAGS_PMCC1) & 1; ctx->singlestep_enabled = 0; if ((hflags >> HFLAGS_SE) & 1) { |