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authorLeandro Lupori <leandro.lupori@eldorado.org.br>2022-10-25 17:24:24 -0300
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-10-28 13:15:23 -0300
commiteeaaefe9fa8b95a7ed39ee86257f3bf1af751804 (patch)
tree68aae0fe616f09eb7060a4573a6069307bd34957 /target/ppc/translate.c
parent8b3d1c49a9f0f315d2b292c1791430c0f382afa4 (diff)
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target/ppc: Increment PMC5 with inline insns
Profiling QEMU during Fedora 35 for PPC64 boot revealed that 6.39% of total time was being spent in helper_insns_inc(), on a POWER9 machine. To avoid calling this helper every time PMCs had to be incremented, an inline implementation of PMC5 increment and check for overflow was developed. This led to a reduction of about 12% in Fedora's boot time. Signed-off-by: Leandro Lupori <leandro.lupori@eldorado.org.br> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20221025202424.195984-4-leandro.lupori@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/translate.c')
-rw-r--r--target/ppc/translate.c28
1 files changed, 25 insertions, 3 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 8d79522..19c1d17 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -36,6 +36,7 @@
#include "exec/log.h"
#include "qemu/atomic128.h"
#include "spr_common.h"
+#include "power8-pmu.h"
#include "qemu/qemu-print.h"
#include "qapi/error.h"
@@ -4271,6 +4272,9 @@ static void pmu_count_insns(DisasContext *ctx)
}
#if !defined(CONFIG_USER_ONLY)
+ TCGLabel *l;
+ TCGv t0;
+
/*
* The PMU insns_inc() helper stops the internal PMU timer if a
* counter overflows happens. In that case, if the guest is
@@ -4279,8 +4283,26 @@ static void pmu_count_insns(DisasContext *ctx)
*/
gen_icount_io_start(ctx);
- gen_helper_insns_inc(cpu_env, tcg_constant_i32(ctx->base.num_insns));
-#else
+ /* Avoid helper calls when only PMC5-6 are enabled. */
+ if (!ctx->pmc_other) {
+ l = gen_new_label();
+ t0 = tcg_temp_new();
+
+ gen_load_spr(t0, SPR_POWER_PMC5);
+ tcg_gen_addi_tl(t0, t0, ctx->base.num_insns);
+ gen_store_spr(SPR_POWER_PMC5, t0);
+ /* Check for overflow, if it's enabled */
+ if (ctx->mmcr0_pmcjce) {
+ tcg_gen_brcondi_tl(TCG_COND_LT, t0, PMC_COUNTER_NEGATIVE_VAL, l);
+ gen_helper_handle_pmc5_overflow(cpu_env);
+ }
+
+ gen_set_label(l);
+ tcg_temp_free(t0);
+ } else {
+ gen_helper_insns_inc(cpu_env, tcg_constant_i32(ctx->base.num_insns));
+ }
+ #else
/*
* User mode can read (but not write) PMC5 and start/stop
* the PMU via MMCR0_FC. In this case just increment
@@ -4293,7 +4315,7 @@ static void pmu_count_insns(DisasContext *ctx)
gen_store_spr(SPR_POWER_PMC5, t0);
tcg_temp_free(t0);
-#endif /* #if !defined(CONFIG_USER_ONLY) */
+ #endif /* #if !defined(CONFIG_USER_ONLY) */
}
#else
static void pmu_count_insns(DisasContext *ctx)