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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-03-23 12:43:35 -0600 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-05-04 11:41:24 +1000 |
| commit | f43520e5b233828bd4d98b4a1300ddb475e7486a (patch) | |
| tree | 264855ba166b319251d4618d96762742380085d7 /target/ppc/translate.c | |
| parent | 7da31f260d194d203c83712cfa7b2dfe605375fd (diff) | |
| download | qemu-f43520e5b233828bd4d98b4a1300ddb475e7486a.zip qemu-f43520e5b233828bd4d98b4a1300ddb475e7486a.tar.gz qemu-f43520e5b233828bd4d98b4a1300ddb475e7486a.tar.bz2 | |
target/ppc: Create helper_scv
Perform the test against FSCR_SCV at runtime, in the helper.
This means we can remove the incorrect set against SCV in
ppc_tr_init_disas_context and do not need to add an HFLAGS bit.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323184340.619757-6-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/translate.c')
| -rw-r--r-- | target/ppc/translate.c | 20 |
1 files changed, 7 insertions, 13 deletions
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 7912495..d48c554 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -173,7 +173,6 @@ struct DisasContext { bool vsx_enabled; bool spe_enabled; bool tm_enabled; - bool scv_enabled; bool gtse; ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */ int singlestep_enabled; @@ -4081,15 +4080,16 @@ static void gen_sc(DisasContext *ctx) #if !defined(CONFIG_USER_ONLY) static void gen_scv(DisasContext *ctx) { - uint32_t lev; + uint32_t lev = (ctx->opcode >> 5) & 0x7F; - if (unlikely(!ctx->scv_enabled)) { - gen_exception_err(ctx, POWERPC_EXCP_FU, FSCR_IC_SCV); - return; + /* Set the PC back to the faulting instruction. */ + if (ctx->exception == POWERPC_EXCP_NONE) { + gen_update_nip(ctx, ctx->base.pc_next - 4); } + gen_helper_scv(cpu_env, tcg_constant_i32(lev)); - lev = (ctx->opcode >> 5) & 0x7F; - gen_exception_err(ctx, POWERPC_SYSCALL_VECTORED, lev); + /* This need not be exact, just not POWERPC_EXCP_NONE */ + ctx->exception = POWERPC_SYSCALL_VECTORED; } #endif #endif @@ -7907,12 +7907,6 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->spe_enabled = (hflags >> HFLAGS_SPE) & 1; ctx->altivec_enabled = (hflags >> HFLAGS_VR) & 1; ctx->vsx_enabled = (hflags >> HFLAGS_VSX) & 1; - if ((env->flags & POWERPC_FLAG_SCV) - && (env->spr[SPR_FSCR] & (1ull << FSCR_SCV))) { - ctx->scv_enabled = true; - } else { - ctx->scv_enabled = false; - } ctx->tm_enabled = (hflags >> HFLAGS_TM) & 1; ctx->gtse = !!(env->spr[SPR_LPCR] & LPCR_GTSE); |