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authorFabiano Rosas <farosas@linux.ibm.com>2021-12-17 17:57:16 +0100
committerCédric Le Goater <clg@kaod.org>2021-12-17 17:57:16 +0100
commitb137fb72d7f41a8c7e4dacbd0394612420db6c5d (patch)
tree68a11b2f84af94a84f4968c4a9d698cb5d72c64f /target/ppc/mmu_helper.c
parent1da666cd8e795295e23f6feac7cf8d06f9c64725 (diff)
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target/ppc: Disable unused facilities in the e600 CPU
The e600 CPU is a successor of the 7448 and like all the 7450s CPUs, it has an optional software TLB feature. We have determined that there is no OS software support for the 7450 software TLB available these days. See the previous commit for more information. This patch disables the SPRs and instructions related to software TLB from the e600 CPU. No functional change intended. These facilities should be used by the OS in interrupt handlers for interrupts that QEMU never generates. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20211130230123.781844-3-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc/mmu_helper.c')
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