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authorPeter Maydell <peter.maydell@linaro.org>2017-08-10 11:12:36 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-08-10 11:12:36 +0100
commitb38df311c174c98ef8cce7dec9f46603b083018e (patch)
tree47148671ab76a9a616a5b34b1e19e2fc1aba1c63 /target/ppc/mmu_helper.c
parent8a6be122e4eec029501a0d61f104fca3a5ae6f30 (diff)
parentf57467e3b326c7736f8e481fd6b680f30e575c87 (diff)
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.10-20170809' into staging
ppc patch queue 2017-08-09 This series contains a number of bugfixes for ppc and related machines, for the qemu-2.10.release. Some are true regressions, others are serious enough and non-invasive enough to fix that it's worth putting in 2.10 this late. # gpg: Signature made Wed 09 Aug 2017 07:31:33 BST # gpg: using RSA key 0x6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.10-20170809: spapr: Fix bug in h_signal_sys_reset() spapr_drc: abort if object_property_add_child() fails target/ppc: Add stub implementation of the PSSCR target/ppc: Implement TIDR ppc: fix double-free in cpu_post_load() booke206: fix MAS update on tlb miss Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/ppc/mmu_helper.c')
-rw-r--r--target/ppc/mmu_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index b7b9088..f06b938 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -1551,7 +1551,7 @@ static int cpu_ppc_handle_mmu_fault(CPUPPCState *env, target_ulong address,
env->spr[SPR_40x_ESR] = 0x00000000;
break;
case POWERPC_MMU_BOOKE206:
- booke206_update_mas_tlb_miss(env, address, rw);
+ booke206_update_mas_tlb_miss(env, address, 2);
/* fall through */
case POWERPC_MMU_BOOKE:
cs->exception_index = POWERPC_EXCP_ITLB;