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author | Richard Henderson <richard.henderson@linaro.org> | 2022-11-12 16:11:22 +1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-02-04 06:19:42 -1000 |
commit | 894448ae7dce4269c4b3c152a7091520317ea397 (patch) | |
tree | 1ea9c575710fab17e5e6a4c785501d47a25c9559 /target/ppc/mem_helper.c | |
parent | 9c32396debee91a87867abc562bb8e2b458c958a (diff) | |
download | qemu-894448ae7dce4269c4b3c152a7091520317ea397.zip qemu-894448ae7dce4269c4b3c152a7091520317ea397.tar.gz qemu-894448ae7dce4269c4b3c152a7091520317ea397.tar.bz2 |
target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX
Note that the previous direct reference to reserve_val,
- tcg_gen_ld_i64(t1, cpu_env, (ctx->le_mode
- ? offsetof(CPUPPCState, reserve_val2)
- : offsetof(CPUPPCState, reserve_val)));
was incorrect because all references should have gone through
cpu_reserve_val. Create a cpu_reserve_val2 tcg temp to fix this.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20221112061122.2720163-2-richard.henderson@linaro.org>
Diffstat (limited to 'target/ppc/mem_helper.c')
-rw-r--r-- | target/ppc/mem_helper.c | 44 |
1 files changed, 0 insertions, 44 deletions
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index d1163f3..1578887 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -413,50 +413,6 @@ void helper_stq_be_parallel(CPUPPCState *env, target_ulong addr, val = int128_make128(lo, hi); cpu_atomic_sto_be_mmu(env, addr, val, opidx, GETPC()); } - -uint32_t helper_stqcx_le_parallel(CPUPPCState *env, target_ulong addr, - uint64_t new_lo, uint64_t new_hi, - uint32_t opidx) -{ - bool success = false; - - /* We will have raised EXCP_ATOMIC from the translator. */ - assert(HAVE_CMPXCHG128); - - if (likely(addr == env->reserve_addr)) { - Int128 oldv, cmpv, newv; - - cmpv = int128_make128(env->reserve_val2, env->reserve_val); - newv = int128_make128(new_lo, new_hi); - oldv = cpu_atomic_cmpxchgo_le_mmu(env, addr, cmpv, newv, - opidx, GETPC()); - success = int128_eq(oldv, cmpv); - } - env->reserve_addr = -1; - return env->so + success * CRF_EQ_BIT; -} - -uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr, - uint64_t new_lo, uint64_t new_hi, - uint32_t opidx) -{ - bool success = false; - - /* We will have raised EXCP_ATOMIC from the translator. */ - assert(HAVE_CMPXCHG128); - - if (likely(addr == env->reserve_addr)) { - Int128 oldv, cmpv, newv; - - cmpv = int128_make128(env->reserve_val2, env->reserve_val); - newv = int128_make128(new_lo, new_hi); - oldv = cpu_atomic_cmpxchgo_be_mmu(env, addr, cmpv, newv, - opidx, GETPC()); - success = int128_eq(oldv, cmpv); - } - env->reserve_addr = -1; - return env->so + success * CRF_EQ_BIT; -} #endif /*****************************************************************************/ |