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author | Víctor Colombo <victor.colombo@eldorado.org.br> | 2022-05-04 18:05:23 -0300 |
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committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-05-05 15:36:17 -0300 |
commit | 1922322ce43091cfb004a4da8d5851b3630718f1 (patch) | |
tree | 8ee43d1b66e2f7d81c5afb6ec642b5d7b4b9d301 /target/ppc/mem_helper.c | |
parent | d41ccf6eea918ec121cd38eda6e2526b446013f4 (diff) | |
download | qemu-1922322ce43091cfb004a4da8d5851b3630718f1.zip qemu-1922322ce43091cfb004a4da8d5851b3630718f1.tar.gz qemu-1922322ce43091cfb004a4da8d5851b3630718f1.tar.bz2 |
target/ppc: Remove msr_le macro
msr_le macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-5-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/mem_helper.c')
-rw-r--r-- | target/ppc/mem_helper.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index fba7f84..9af135e 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -33,9 +33,9 @@ static inline bool needs_byteswap(const CPUPPCState *env) { #if TARGET_BIG_ENDIAN - return msr_le; + return FIELD_EX64(env->msr, MSR, LE); #else - return !msr_le; + return !FIELD_EX64(env->msr, MSR, LE); #endif } @@ -470,8 +470,8 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr, #endif /* - * We use msr_le to determine index ordering in a vector. However, - * byteswapping is not simply controlled by msr_le. We also need to + * We use MSR_LE to determine index ordering in a vector. However, + * byteswapping is not simply controlled by MSR_LE. We also need to * take into account endianness of the target. This is done for the * little-endian PPC64 user-mode target. */ @@ -484,7 +484,7 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env, target_ulong addr, int adjust = HI_IDX * (n_elems - 1); \ int sh = sizeof(r->element[0]) >> 1; \ int index = (addr & 0xf) >> sh; \ - if (msr_le) { \ + if (FIELD_EX64(env->msr, MSR, LE)) { \ index = n_elems - index - 1; \ } \ \ @@ -511,7 +511,7 @@ LVE(lvewx, cpu_ldl_data_ra, bswap32, u32) int adjust = HI_IDX * (n_elems - 1); \ int sh = sizeof(r->element[0]) >> 1; \ int index = (addr & 0xf) >> sh; \ - if (msr_le) { \ + if (FIELD_EX64(env->msr, MSR, LE)) { \ index = n_elems - index - 1; \ } \ \ @@ -545,7 +545,7 @@ void helper_##name(CPUPPCState *env, target_ulong addr, \ t.s128 = int128_zero(); \ if (nb) { \ nb = (nb >= 16) ? 16 : nb; \ - if (msr_le && !lj) { \ + if (FIELD_EX64(env->msr, MSR, LE) && !lj) { \ for (i = 16; i > 16 - nb; i--) { \ t.VsrB(i - 1) = cpu_ldub_data_ra(env, addr, GETPC()); \ addr = addr_add(env, addr, 1); \ @@ -576,7 +576,7 @@ void helper_##name(CPUPPCState *env, target_ulong addr, \ } \ \ nb = (nb >= 16) ? 16 : nb; \ - if (msr_le && !lj) { \ + if (FIELD_EX64(env->msr, MSR, LE) && !lj) { \ for (i = 16; i > 16 - nb; i--) { \ cpu_stb_data_ra(env, addr, xt->VsrB(i - 1), GETPC()); \ addr = addr_add(env, addr, 1); \ |