diff options
| author | Matheus Ferst <matheus.ferst@eldorado.org.br> | 2021-11-04 09:37:01 -0300 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2021-11-09 10:32:52 +1100 |
| commit | 2c9f79584107313e880995ffd2b36f6d28b7bc2e (patch) | |
| tree | 467c1da41d4d643766d1e32873c0a0fea3c53c2a /target/ppc/insn32.decode | |
| parent | 23832ae6d53a25e3a56f103fcba55ead17e8e0cf (diff) | |
| download | qemu-2c9f79584107313e880995ffd2b36f6d28b7bc2e.zip qemu-2c9f79584107313e880995ffd2b36f6d28b7bc2e.tar.gz qemu-2c9f79584107313e880995ffd2b36f6d28b7bc2e.tar.bz2 | |
target/ppc: Implement Vector Insert from VSR using GPR index insns
Implements the following PowerISA v3.1 instructions:
vinsbvlx: Vector Insert Byte from VSR using GPR-specified Left-Index
vinshvlx: Vector Insert Halfword from VSR using GPR-specified
Left-Index
vinswvlx: Vector Insert Word from VSR using GPR-specified Left-Index
vinsbvrx: Vector Insert Byte from VSR using GPR-specified Right-Index
vinshvrx: Vector Insert Halfword from VSR using GPR-specified
Right-Index
vinswvrx: Vector Insert Word from VSR using GPR-specified Right-Index
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-8-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/insn32.decode')
| -rw-r--r-- | target/ppc/insn32.decode | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index e1f76aa..de410ab 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -359,5 +359,12 @@ VINSDRX 000100 ..... ..... ..... 01111001111 @VX VINSW 000100 ..... - .... ..... 00011001111 @VX_uim4 VINSD 000100 ..... - .... ..... 00111001111 @VX_uim4 +VINSBVLX 000100 ..... ..... ..... 00000001111 @VX +VINSBVRX 000100 ..... ..... ..... 00100001111 @VX +VINSHVLX 000100 ..... ..... ..... 00001001111 @VX +VINSHVRX 000100 ..... ..... ..... 00101001111 @VX +VINSWVLX 000100 ..... ..... ..... 00010001111 @VX +VINSWVRX 000100 ..... ..... ..... 00110001111 @VX + VSLDBI 000100 ..... ..... ..... 00 ... 010110 @VN VSRDBI 000100 ..... ..... ..... 01 ... 010110 @VN |