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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-11-12 16:11:22 +1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-02-04 06:19:42 -1000 |
| commit | 894448ae7dce4269c4b3c152a7091520317ea397 (patch) | |
| tree | 1ea9c575710fab17e5e6a4c785501d47a25c9559 /target/ppc/helper.h | |
| parent | 9c32396debee91a87867abc562bb8e2b458c958a (diff) | |
| download | qemu-894448ae7dce4269c4b3c152a7091520317ea397.zip qemu-894448ae7dce4269c4b3c152a7091520317ea397.tar.gz qemu-894448ae7dce4269c4b3c152a7091520317ea397.tar.bz2 | |
target/ppc: Use tcg_gen_atomic_cmpxchg_i128 for STQCX
Note that the previous direct reference to reserve_val,
- tcg_gen_ld_i64(t1, cpu_env, (ctx->le_mode
- ? offsetof(CPUPPCState, reserve_val2)
- : offsetof(CPUPPCState, reserve_val)));
was incorrect because all references should have gone through
cpu_reserve_val. Create a cpu_reserve_val2 tcg temp to fix this.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20221112061122.2720163-2-richard.henderson@linaro.org>
Diffstat (limited to 'target/ppc/helper.h')
| -rw-r--r-- | target/ppc/helper.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 8dd22a3..0beaca5 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -818,6 +818,4 @@ DEF_HELPER_FLAGS_5(stq_le_parallel, TCG_CALL_NO_WG, void, env, tl, i64, i64, i32) DEF_HELPER_FLAGS_5(stq_be_parallel, TCG_CALL_NO_WG, void, env, tl, i64, i64, i32) -DEF_HELPER_5(stqcx_le_parallel, i32, env, tl, i64, i64, i32) -DEF_HELPER_5(stqcx_be_parallel, i32, env, tl, i64, i64, i32) #endif |