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authorRichard Henderson <richard.henderson@linaro.org>2021-12-17 17:57:14 +0100
committerCédric Le Goater <clg@kaod.org>2021-12-17 17:57:14 +0100
commitf2e25046766ed39e56d8dd5c6de790e430804511 (patch)
tree7f7db93a75f22b5ef212c570df1b568c13cc40d5 /target/ppc/fpu_helper.c
parentc07f82416cb7973c64d1e21c09957182b4b033dc (diff)
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target/ppc: Move float_check_status from FPU_FCTI to translate
Fixes a bug in which e.g XE enabled causes inexact to be raised before the writeback to the architectural register. All of the users of GEN_FLOAT_B either set set_fprf, or are one of the convert-to-integer instructions that require this behaviour. Split out the two gen_helper_* calls in gen_compute_fprf_float64 and protect only the first with set_fprf. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211119160502.17432-12-richard.henderson@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc/fpu_helper.c')
-rw-r--r--target/ppc/fpu_helper.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 9bcd7ab..f453b04 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -600,12 +600,9 @@ uint64_t helper_##op(CPUPPCState *env, float64 arg) \
uint64_t ret = float64_to_##cvt(arg, &env->fp_status); \
int status = get_float_exception_flags(&env->fp_status); \
\
- if (unlikely(status)) { \
- if (status & float_flag_invalid) { \
- float_invalid_cvt(env, 1, GETPC(), float64_classify(arg)); \
- ret = nanval; \
- } \
- do_float_check_status(env, GETPC()); \
+ if (unlikely(status & float_flag_invalid)) { \
+ float_invalid_cvt(env, 1, GETPC(), float64_classify(arg)); \
+ ret = nanval; \
} \
return ret; \
}