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author | Nicholas Piggin <npiggin@gmail.com> | 2023-06-20 23:13:21 +1000 |
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committer | Cédric Le Goater <clg@kaod.org> | 2023-06-25 22:41:30 +0200 |
commit | eb701f30120d899bdaa202c3cbd9219055fccae0 (patch) | |
tree | 57b1b129bc8ee54ced2634a204ae817d6157e5b6 /target/ppc/excp_helper.c | |
parent | a3c020d85ea721fc2a57b28f305a532b2c388f7c (diff) | |
download | qemu-eb701f30120d899bdaa202c3cbd9219055fccae0.zip qemu-eb701f30120d899bdaa202c3cbd9219055fccae0.tar.gz qemu-eb701f30120d899bdaa202c3cbd9219055fccae0.tar.bz2 |
target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call interrupts
System call interrupts in ISA v3.1 CPUs add a LEV indication in SRR1
that corresponds with the LEV field of the instruction that caused the
interrupt.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc/excp_helper.c')
-rw-r--r-- | target/ppc/excp_helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 2a0070c..8e2fec3 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1591,6 +1591,10 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp) vhc->hypercall(cpu->vhyp, cpu); return; } + if (env->insns_flags2 & PPC2_ISA310) { + /* ISAv3.1 puts LEV into SRR1 */ + msr |= lev << 20; + } if (lev == 1) { new_msr |= (target_ulong)MSR_HVB; } |