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authorBruno Larsen (billionai) <bruno.larsen@eldorado.org.br>2021-05-25 08:53:53 -0300
committerDavid Gibson <david@gibson.dropbear.id.au>2021-06-03 13:22:06 +1000
commit2b44e21949352ffa045399c56a6ddde86eeb2ec6 (patch)
tree16c66becd918e6eab75c6072b987411fcbb180dc /target/ppc/excp_helper.c
parent52e9612ee94b58a1bc57242427b4dbe6c766d8f3 (diff)
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target/ppc: added ifdefs around TCG-only code
excp_helper.c, mmu-hash64.c and mmu_helper.c have some function declarations that are TCG-only, and couldn't be easily moved to a TCG only file, so ifdefs were added around them. We also needed ifdefs around some header files because helper-proto.h includes trace/generated-helpers.h, which is never created when building without TCG, and cpu_ldst.h includes tcg/tcg.h, whose containing folder is not included as a -iquote. As future cleanup, we could change the part of the configuration script to add those. cpu_init.c also had a callback definition that is TCG only and could be removed as part of a future cleanup (all the dump_statistics part is almost never used and will become obsolete as we transition to using decodetree). Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210525115355.8254-3-bruno.larsen@eldorado.org.br> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target/ppc/excp_helper.c')
-rw-r--r--target/ppc/excp_helper.c21
1 files changed, 18 insertions, 3 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index f4f1527..0441805 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -19,12 +19,15 @@
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
#include "cpu.h"
-#include "exec/helper-proto.h"
#include "exec/exec-all.h"
-#include "exec/cpu_ldst.h"
#include "internal.h"
#include "helper_regs.h"
+#ifdef CONFIG_TCG
+#include "exec/helper-proto.h"
+#include "exec/cpu_ldst.h"
+#endif
+
/* #define DEBUG_OP */
/* #define DEBUG_SOFTWARE_TLB */
/* #define DEBUG_EXCEPTIONS */
@@ -1208,6 +1211,7 @@ void raise_exception_ra(CPUPPCState *env, uint32_t exception,
raise_exception_err_ra(env, exception, 0, raddr);
}
+#ifdef CONFIG_TCG
void helper_raise_exception_err(CPUPPCState *env, uint32_t exception,
uint32_t error_code)
{
@@ -1218,8 +1222,10 @@ void helper_raise_exception(CPUPPCState *env, uint32_t exception)
{
raise_exception_err_ra(env, exception, 0, 0);
}
+#endif
#if !defined(CONFIG_USER_ONLY)
+#ifdef CONFIG_TCG
void helper_store_msr(CPUPPCState *env, target_ulong val)
{
uint32_t excp = hreg_store_msr(env, val, 0);
@@ -1259,6 +1265,7 @@ void helper_pminsn(CPUPPCState *env, powerpc_pm_insn_t insn)
(env->spr[SPR_PSSCR] & PSSCR_EC);
}
#endif /* defined(TARGET_PPC64) */
+#endif /* CONFIG_TCG */
static inline void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr)
{
@@ -1293,6 +1300,7 @@ static inline void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr)
check_tlb_flush(env, false);
}
+#ifdef CONFIG_TCG
void helper_rfi(CPUPPCState *env)
{
do_rfi(env, env->spr[SPR_SRR0], env->spr[SPR_SRR1] & 0xfffffffful);
@@ -1345,8 +1353,10 @@ void helper_rfmci(CPUPPCState *env)
/* FIXME: choose CSRR1 or MCSRR1 based on cpu type */
do_rfi(env, env->spr[SPR_BOOKE_MCSRR0], env->spr[SPR_BOOKE_MCSRR1]);
}
-#endif
+#endif /* CONFIG_TCG */
+#endif /* !defined(CONFIG_USER_ONLY) */
+#ifdef CONFIG_TCG
void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
uint32_t flags)
{
@@ -1374,11 +1384,13 @@ void helper_td(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
}
}
#endif
+#endif
#if !defined(CONFIG_USER_ONLY)
/*****************************************************************************/
/* PowerPC 601 specific instructions (POWER bridge) */
+#ifdef CONFIG_TCG
void helper_rfsvc(CPUPPCState *env)
{
do_rfi(env, env->lr, env->ctr & 0x0000FFFF);
@@ -1523,8 +1535,10 @@ void helper_book3s_msgsndp(CPUPPCState *env, target_ulong rb)
book3s_msgsnd_common(pir, PPC_INTERRUPT_DOORBELL);
}
#endif
+#endif /* CONFIG_TCG */
#endif
+#ifdef CONFIG_TCG
void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
MMUAccessType access_type,
int mmu_idx, uintptr_t retaddr)
@@ -1540,3 +1554,4 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
env->error_code = insn & 0x03FF0000;
cpu_loop_exit(cs);
}
+#endif