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| author | Víctor Colombo <victor.colombo@eldorado.org.br> | 2022-05-04 18:05:22 -0300 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2022-05-05 15:36:17 -0300 |
| commit | d41ccf6eea918ec121cd38eda6e2526b446013f4 (patch) | |
| tree | e0c0779f0836922c6550dd1a769d599510c6b8f8 /target/ppc/cpu.h | |
| parent | 92984c96df27d9f5bb783846c0cc2ccc8068a7a7 (diff) | |
| download | qemu-d41ccf6eea918ec121cd38eda6e2526b446013f4.zip qemu-d41ccf6eea918ec121cd38eda6e2526b446013f4.tar.gz qemu-d41ccf6eea918ec121cd38eda6e2526b446013f4.tar.bz2 | |
target/ppc: Remove msr_pr macro
msr_pr macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220504210541.115256-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'target/ppc/cpu.h')
| -rw-r--r-- | target/ppc/cpu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 112b456..8f1dc4c 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -25,6 +25,7 @@ #include "exec/cpu-defs.h" #include "cpu-qom.h" #include "qom/object.h" +#include "hw/registerfields.h" #define TCG_GUEST_DEFAULT_MO 0 @@ -353,6 +354,8 @@ typedef enum { #define MSR_RI 1 /* Recoverable interrupt 1 */ #define MSR_LE 0 /* Little-endian mode 1 hflags */ +FIELD(MSR, PR, MSR_PR, 1) + /* PMU bits */ #define MMCR0_FC PPC_BIT(32) /* Freeze Counters */ #define MMCR0_PMAO PPC_BIT(56) /* Perf Monitor Alert Ocurred */ @@ -474,7 +477,6 @@ typedef enum { #define msr_ce ((env->msr >> MSR_CE) & 1) #define msr_ile ((env->msr >> MSR_ILE) & 1) #define msr_ee ((env->msr >> MSR_EE) & 1) -#define msr_pr ((env->msr >> MSR_PR) & 1) #define msr_fp ((env->msr >> MSR_FP) & 1) #define msr_me ((env->msr >> MSR_ME) & 1) #define msr_fe0 ((env->msr >> MSR_FE0) & 1) |