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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-02-07 13:35:58 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-03-06 22:23:09 +0100 |
| commit | 1ea4a06af0f6578e5d0ddcea148503290b1c4907 (patch) | |
| tree | 060b35cfbdf984ec058efb07d1815283b1058dd0 /target/ppc/cpu.h | |
| parent | 36861198754af7577c73cdb19e1e385c933bfdc8 (diff) | |
| download | qemu-1ea4a06af0f6578e5d0ddcea148503290b1c4907.zip qemu-1ea4a06af0f6578e5d0ddcea148503290b1c4907.tar.gz qemu-1ea4a06af0f6578e5d0ddcea148503290b1c4907.tar.bz2 | |
target: Use CPUArchState as interface to target-specific CPU state
While CPUState is our interface with generic code, CPUArchState is
our interface with target-specific code. Use CPUArchState as an
abstract type, defined by each target.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-13-f4bug@amsat.org>
Diffstat (limited to 'target/ppc/cpu.h')
| -rw-r--r-- | target/ppc/cpu.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 1b68752..7be5ca2 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1077,7 +1077,7 @@ struct ppc_radix_page_info { #define PPC_CPU_OPCODES_LEN 0x40 #define PPC_CPU_INDIRECT_OPCODES_LEN 0x20 -struct CPUPPCState { +struct CPUArchState { /* Most commonly used resources during translated code execution first */ target_ulong gpr[32]; /* general purpose registers */ target_ulong gprh[32]; /* storage for GPR MSB, used by the SPE extension */ @@ -1477,7 +1477,6 @@ void ppc_compat_add_property(Object *obj, const char *name, uint32_t *compat_pvr, const char *basedesc); #endif /* defined(TARGET_PPC64) */ -typedef CPUPPCState CPUArchState; typedef PowerPCCPU ArchCPU; #include "exec/cpu-all.h" |