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| author | David Gibson <david@gibson.dropbear.id.au> | 2018-03-23 14:11:07 +1100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-04-27 18:05:22 +1000 |
| commit | 58969eeece99abd6d31d530ad371e789419ec9bf (patch) | |
| tree | f8f64ca415813f90b20e2b02c99cdebbbb91cc51 /target/ppc/cpu-qom.h | |
| parent | 21e405f1ecd16a9036d838222f2212ec10370059 (diff) | |
| download | qemu-58969eeece99abd6d31d530ad371e789419ec9bf.zip qemu-58969eeece99abd6d31d530ad371e789419ec9bf.tar.gz qemu-58969eeece99abd6d31d530ad371e789419ec9bf.tar.bz2 | |
target/ppc: Move 1T segment and AMR options to PPCHash64Options
Currently env->mmu_model is a bit of an unholy mess of an enum of distinct
MMU types, with various flag bits as well. This makes which bits of the
field should be compared pretty confusing.
Make a start on cleaning that up by moving two of the flags bits -
POWERPC_MMU_1TSEG and POWERPC_MMU_AMR - which are specific to the 64-bit
hash MMU into a new flags field in PPCHash64Options structure.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'target/ppc/cpu-qom.h')
| -rw-r--r-- | target/ppc/cpu-qom.h | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index 3e5ef73..2bd58b2 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -68,22 +68,17 @@ enum powerpc_mmu_t { /* PowerPC 601 MMU model (specific BATs format) */ POWERPC_MMU_601 = 0x0000000A, #define POWERPC_MMU_64 0x00010000 -#define POWERPC_MMU_1TSEG 0x00020000 -#define POWERPC_MMU_AMR 0x00040000 #define POWERPC_MMU_V3 0x00100000 /* ISA V3.00 MMU Support */ /* 64 bits PowerPC MMU */ POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001, /* Architecture 2.03 and later (has LPCR) */ POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002, /* Architecture 2.06 variant */ - POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG - | POWERPC_MMU_AMR | 0x00000003, + POWERPC_MMU_2_06 = POWERPC_MMU_64 | 0x00000003, /* Architecture 2.07 variant */ - POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG - | POWERPC_MMU_AMR | 0x00000004, + POWERPC_MMU_2_07 = POWERPC_MMU_64 | 0x00000004, /* Architecture 3.00 variant */ - POWERPC_MMU_3_00 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG - | POWERPC_MMU_AMR | POWERPC_MMU_V3 + POWERPC_MMU_3_00 = POWERPC_MMU_64 | POWERPC_MMU_V3 | 0x00000005, }; #define POWERPC_MMU_VER(x) ((x) & (POWERPC_MMU_64 | 0xFFFF)) |