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| author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-01-12 11:28:27 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-01-12 11:28:27 +0100 |
| commit | 516fc1036b06a48042de1309c4e76abda255cf7b (patch) | |
| tree | 62f914033ecacc4a4ad7655cbd2281ae43f2be54 /target/ppc/arch_dump.c | |
| parent | 4dff75fe95e1aa101567d7052301f125a21323e4 (diff) | |
| download | qemu-516fc1036b06a48042de1309c4e76abda255cf7b.zip qemu-516fc1036b06a48042de1309c4e76abda255cf7b.tar.gz qemu-516fc1036b06a48042de1309c4e76abda255cf7b.tar.bz2 | |
target/ppc: Add HV support to ppc_interrupts_little_endian
The ppc_interrupts_little_endian function could be used for interrupts
delivered in Hypervisor mode, so add support for powernv8 and powernv9
to it.
Also drop the comment because it is inaccurate, all CPUs that can run
little endian can have interrupts in little endian. The point is
whether they can take interrupts in an endianness different from
MSR_LE.
This change has no functional impact.
Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20220107222601.4101511-5-farosas@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'target/ppc/arch_dump.c')
| -rw-r--r-- | target/ppc/arch_dump.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/ppc/arch_dump.c b/target/ppc/arch_dump.c index bb392f6..12cde19 100644 --- a/target/ppc/arch_dump.c +++ b/target/ppc/arch_dump.c @@ -237,7 +237,7 @@ int cpu_get_dump_info(ArchDumpInfo *info, info->d_machine = PPC_ELF_MACHINE; info->d_class = ELFCLASS; - if (ppc_interrupts_little_endian(cpu)) { + if (ppc_interrupts_little_endian(cpu, false)) { info->d_endian = ELFDATA2LSB; } else { info->d_endian = ELFDATA2MSB; |