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authorRichard Henderson <richard.henderson@linaro.org>2017-10-15 19:02:42 -0700
committerRichard Henderson <richard.henderson@linaro.org>2017-10-24 22:00:13 +0200
commit55c3ceef61fcf06fc98ddc752b7cce788ce7680b (patch)
tree39cb3c0c16d33de6491e3dc7fa5a71933463490f /target/openrisc
parent11f4e8f8bfaa2caaab24bef6bbbb8a0205015119 (diff)
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qom: Introduce CPUClass.tcg_initialize
Move target cpu tcg initialization to common code, called from cpu_exec_realizefn. Acked-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/openrisc')
-rw-r--r--target/openrisc/cpu.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index a6d2049..a8db869 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -86,18 +86,12 @@ static void openrisc_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
OpenRISCCPU *cpu = OPENRISC_CPU(obj);
- static int inited;
cs->env_ptr = &cpu->env;
#ifndef CONFIG_USER_ONLY
cpu_openrisc_mmu_init(cpu);
#endif
-
- if (tcg_enabled() && !inited) {
- inited = 1;
- openrisc_translate_init();
- }
}
/* CPU models */
@@ -169,6 +163,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
dc->vmsd = &vmstate_openrisc_cpu;
#endif
cc->gdb_num_core_regs = 32 + 3;
+ cc->tcg_initialize = openrisc_translate_init;
}
static void cpu_register(const OpenRISCCPUInfo *info)