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| author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-22 16:51:19 -0700 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2018-07-03 00:05:28 +0900 |
| commit | 23d45ebdb198378ae580c98ac898aa4b615059fd (patch) | |
| tree | 4463196c531f9677f1436f0c80132b1086642a19 /target/openrisc/sys_helper.c | |
| parent | 455d45d22cc3b2c29c7840f2478647a0a3d9d8b4 (diff) | |
| download | qemu-23d45ebdb198378ae580c98ac898aa4b615059fd.zip qemu-23d45ebdb198378ae580c98ac898aa4b615059fd.tar.gz qemu-23d45ebdb198378ae580c98ac898aa4b615059fd.tar.bz2 | |
target/openrisc: Remove indirect function calls for mmu
There is no reason to use an indirect branch instead
of simply testing the SR bits that control mmu state.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'target/openrisc/sys_helper.c')
| -rw-r--r-- | target/openrisc/sys_helper.c | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index ff315f6..9b4339b 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -60,21 +60,6 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb) tlb_flush(cs); } cpu_set_sr(env, rb); - if (env->sr & SR_DME) { - env->tlb.cpu_openrisc_map_address_data = - &cpu_openrisc_get_phys_data; - } else { - env->tlb.cpu_openrisc_map_address_data = - &cpu_openrisc_get_phys_nommu; - } - - if (env->sr & SR_IME) { - env->tlb.cpu_openrisc_map_address_code = - &cpu_openrisc_get_phys_code; - } else { - env->tlb.cpu_openrisc_map_address_code = - &cpu_openrisc_get_phys_nommu; - } break; case TO_SPR(0, 18): /* PPC */ |