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| author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-22 19:51:00 -0700 |
|---|---|---|
| committer | Stafford Horne <shorne@gmail.com> | 2018-07-03 00:05:28 +0900 |
| commit | b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056 (patch) | |
| tree | 15dba503a0704eca2b64bf8b77e7621bcd3208b5 /target/openrisc/interrupt_helper.c | |
| parent | fffde6695f4be3cf484f068f24e894280d7360ea (diff) | |
| download | qemu-b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056.zip qemu-b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056.tar.gz qemu-b9bed1b9ab37a6ae62e88a52cbcbd2ad81aa1056.tar.bz2 | |
target/openrisc: Fix cpu_mmu_index
The code in cpu_mmu_index does not properly honor SR_DME.
This bug has workarounds elsewhere in that we flush the
tlb more often than necessary, on the state changes that
should be reflected in a change of mmu_index.
Fixing this means that we can respect the mmu_index that
is given to tlb_flush.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>
Diffstat (limited to 'target/openrisc/interrupt_helper.c')
| -rw-r--r-- | target/openrisc/interrupt_helper.c | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/target/openrisc/interrupt_helper.c b/target/openrisc/interrupt_helper.c index a2e9003..9c5489f 100644 --- a/target/openrisc/interrupt_helper.c +++ b/target/openrisc/interrupt_helper.c @@ -25,16 +25,7 @@ void HELPER(rfe)(CPUOpenRISCState *env) { - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); -#ifndef CONFIG_USER_ONLY - int need_flush_tlb = (cpu->env.sr & (SR_SM | SR_IME | SR_DME)) ^ - (cpu->env.esr & (SR_SM | SR_IME | SR_DME)); - if (need_flush_tlb) { - CPUState *cs = CPU(cpu); - tlb_flush(cs); - } -#endif - cpu->env.pc = cpu->env.epcr; - cpu->env.lock_addr = -1; - cpu_set_sr(&cpu->env, cpu->env.esr); + env->pc = env->epcr; + env->lock_addr = -1; + cpu_set_sr(env, env->esr); } |