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author | Richard Henderson <rth@twiddle.net> | 2015-02-18 22:19:18 -0800 |
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committer | Richard Henderson <rth@twiddle.net> | 2017-02-14 08:14:59 +1100 |
commit | 930c3d0074ad0a5e26560f2133f82d803369bec3 (patch) | |
tree | 63e542ad7464a4994d4717bdbf7d501cf685a871 /target/openrisc/cpu.h | |
parent | c56e3b86701501364a4756201b6a9db9454463ab (diff) | |
download | qemu-930c3d0074ad0a5e26560f2133f82d803369bec3.zip qemu-930c3d0074ad0a5e26560f2133f82d803369bec3.tar.gz qemu-930c3d0074ad0a5e26560f2133f82d803369bec3.tar.bz2 |
target/openrisc: Implement lwa, swa
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target/openrisc/cpu.h')
-rw-r--r-- | target/openrisc/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 231c163..06d0e89 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -296,6 +296,9 @@ typedef struct CPUOpenRISCState { uint32_t fpcsr; /* Float register */ float_status fp_status; + target_ulong lock_addr; + target_ulong lock_value; + uint32_t flags; /* cpu_flags, we only use it for exception in solt so far. */ uint32_t btaken; /* the SR_F bit */ |