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author | Richard Henderson <richard.henderson@linaro.org> | 2021-09-14 20:33:23 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2021-11-02 07:00:52 -0400 |
commit | 12f0bc55791bd6e0864a430a0c3c9518ae7622e8 (patch) | |
tree | 23a824020ae543fe3ced41313a90ed5376ce725f /target/openrisc/cpu.h | |
parent | d315712b69fa34c27d09d425ca5951a08b07ade8 (diff) | |
download | qemu-12f0bc55791bd6e0864a430a0c3c9518ae7622e8.zip qemu-12f0bc55791bd6e0864a430a0c3c9518ae7622e8.tar.gz qemu-12f0bc55791bd6e0864a430a0c3c9518ae7622e8.tar.bz2 |
target/openrisc: Make openrisc_cpu_tlb_fill sysemu only
The fallback code in cpu_loop_exit_sigsegv is sufficient for
openrisc linux-user.
This makes all of the code in mmu.c sysemu only, so remove
the ifdefs and move the file to openrisc_softmmu_ss.
Remove the code from cpu_loop that handled EXCP_DPF.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/openrisc/cpu.h')
-rw-r--r-- | target/openrisc/cpu.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 187a4a1..ee069b0 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -317,14 +317,15 @@ hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int openrisc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int openrisc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); void openrisc_translate_init(void); -bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); int print_insn_or1k(bfd_vma addr, disassemble_info *info); #define cpu_list cpu_openrisc_list #ifndef CONFIG_USER_ONLY +bool openrisc_cpu_tlb_fill(CPUState *cs, vaddr address, int size, + MMUAccessType access_type, int mmu_idx, + bool probe, uintptr_t retaddr); + extern const VMStateDescription vmstate_openrisc_cpu; void openrisc_cpu_do_interrupt(CPUState *cpu); |