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authorAmir Gonnen <amir.gonnen@neuroblade.ai>2022-04-21 08:16:48 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-04-26 08:16:41 -0700
commit8d855c89d1030ddf3d9093d6775fbc338a0b89cb (patch)
tree0f1aa4ec0c662b7f17470fe70976c9c643eb18e9 /target/nios2/translate.c
parent17a406eec574e6e97fa7d5c70047026502a358cb (diff)
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target/nios2: Split out helper for eret instruction
The implementation of eret will become much more complex with the introduction of shadow registers. [rth: Split out of a larger patch for shadow register sets. Directly exit to the cpu loop from the helper.] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Amir Gonnen <amir.gonnen@neuroblade.ai> Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-18-richard.henderson@linaro.org>
Diffstat (limited to 'target/nios2/translate.c')
-rw-r--r--target/nios2/translate.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 226bd9e..53699ee 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -391,10 +391,12 @@ static void eret(DisasContext *dc, uint32_t code, uint32_t flags)
return;
}
- tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]);
- tcg_gen_mov_tl(cpu_pc, cpu_R[R_EA]);
-
- dc->base.is_jmp = DISAS_JUMP;
+#ifdef CONFIG_USER_ONLY
+ g_assert_not_reached();
+#else
+ gen_helper_eret(cpu_env, cpu_R[CR_ESTATUS], cpu_R[R_EA]);
+ dc->base.is_jmp = DISAS_NORETURN;
+#endif
}
/* PC <- ra */