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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-10-27 19:56:19 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-11-02 14:32:32 +0100 |
| commit | 675cf7817c9c0171af387faf8169bd5b8bd3d303 (patch) | |
| tree | ef3b7bbd4d235cb3d8a09025dcf48125a5c8be1d /target/mips | |
| parent | ba7b6f025ba84a5a32c6cd07ffc8634ad2b33c20 (diff) | |
| download | qemu-675cf7817c9c0171af387faf8169bd5b8bd3d303.zip qemu-675cf7817c9c0171af387faf8169bd5b8bd3d303.tar.gz qemu-675cf7817c9c0171af387faf8169bd5b8bd3d303.tar.bz2 | |
target/mips: Remove obsolete FCR0_HAS2008 comment on P5600 CPU
FCR0_HAS2008 flag has been enabled in commit ba5c79f2622
("target-mips: indicate presence of IEEE 754-2008 FPU in
R6/R5+MSA CPUs"), so remove the obsolete FIXME comment.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211028212103.2126176-1-f4bug@amsat.org>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/cpu-defs.c.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index ee8b322..582f940 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -369,7 +369,6 @@ const mips_def_t mips_defs[] = * Config3: VZ, CTXTC, CDMM, TL * Config4: MMUExtDef * Config5: MRP - * FIR(FCR0): Has2008 * */ .name = "P5600", .CP0_PRid = 0x0001A800, |