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author | Richard Henderson <richard.henderson@linaro.org> | 2021-07-19 09:39:49 -1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2021-07-21 07:47:05 -1000 |
commit | b5cf74284166c1ecd119388c31b6eca8e1d7b4a6 (patch) | |
tree | cbb8ecfd7057eaa56aefffacc5867bcbd57e3fa0 /target/mips | |
parent | 10c37828b213cd490bd20e243916e96f5d588c8d (diff) | |
download | qemu-b5cf74284166c1ecd119388c31b6eca8e1d7b4a6.zip qemu-b5cf74284166c1ecd119388c31b6eca8e1d7b4a6.tar.gz qemu-b5cf74284166c1ecd119388c31b6eca8e1d7b4a6.tar.bz2 |
accel/tcg: Remove TranslatorOps.breakpoint_check
The hook is now unused, with breakpoints checked outside translation.
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips')
-rw-r--r-- | target/mips/tcg/translate.c | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index fd980ea..5b03545 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -16178,24 +16178,6 @@ static void mips_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) ctx->btarget); } -static bool mips_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs, - const CPUBreakpoint *bp) -{ - DisasContext *ctx = container_of(dcbase, DisasContext, base); - - save_cpu_state(ctx, 1); - ctx->base.is_jmp = DISAS_NORETURN; - gen_helper_raise_exception_debug(cpu_env); - /* - * The address covered by the breakpoint must be included in - * [tb->pc, tb->pc + tb->size) in order to for it to be - * properly cleared -- thus we increment the PC here so that - * the logic setting tb->size below does the right thing. - */ - ctx->base.pc_next += 4; - return true; -} - static void mips_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) { CPUMIPSState *env = cs->env_ptr; @@ -16303,7 +16285,6 @@ static const TranslatorOps mips_tr_ops = { .init_disas_context = mips_tr_init_disas_context, .tb_start = mips_tr_tb_start, .insn_start = mips_tr_insn_start, - .breakpoint_check = mips_tr_breakpoint_check, .translate_insn = mips_tr_translate_insn, .tb_stop = mips_tr_tb_stop, .disas_log = mips_tr_disas_log, |