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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-07-28 13:18:48 +0200
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-08-25 13:02:14 +0200
commit9d0053923904215d95e8e5ab14b38bb792a0a68f (patch)
tree8d92642c08209f217c0c84486b943cdb37c532a8 /target/mips
parent6629f79f53ea9a1caa3f3c842fa3d02488116486 (diff)
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target/mips: Introduce decodetree structure for NEC Vr54xx extension
The decoder is called but doesn't decode anything. This will ease reviewing the next commit. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210801235926.3178085-3-f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips')
-rw-r--r--target/mips/tcg/meson.build2
-rw-r--r--target/mips/tcg/translate.c3
-rw-r--r--target/mips/tcg/translate.h1
-rw-r--r--target/mips/tcg/vr54xx.decode8
-rw-r--r--target/mips/tcg/vr54xx_translate.c19
5 files changed, 33 insertions, 0 deletions
diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
index ff618a1..8f6f750 100644
--- a/target/mips/tcg/meson.build
+++ b/target/mips/tcg/meson.build
@@ -2,6 +2,7 @@ gen = [
decodetree.process('rel6.decode', extra_args: ['--decode=decode_isa_rel6']),
decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'),
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
+ decodetree.process('vr54xx.decode', extra_args: '--decode=decode_ext_vr54xx'),
]
mips_ss.add(gen)
@@ -19,6 +20,7 @@ mips_ss.add(files(
'translate_addr_const.c',
'txx9_translate.c',
'vr54xx_helper.c',
+ 'vr54xx_translate.c',
))
mips_ss.add(when: 'TARGET_MIPS64', if_true: files(
'tx79_translate.c',
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 490add3..3436363 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -16098,6 +16098,9 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
if (cpu_supports_isa(env, INSN_R5900) && decode_ext_txx9(ctx, ctx->opcode)) {
return;
}
+ if (cpu_supports_isa(env, INSN_VR54XX) && decode_ext_vr54xx(ctx, ctx->opcode)) {
+ return;
+ }
/* ISA extensions */
if (ase_msa_available(env) && decode_ase_msa(ctx, ctx->opcode)) {
diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
index 791e3e2..bb0a6b8 100644
--- a/target/mips/tcg/translate.h
+++ b/target/mips/tcg/translate.h
@@ -201,6 +201,7 @@ bool decode_ext_txx9(DisasContext *ctx, uint32_t insn);
#if defined(TARGET_MIPS64)
bool decode_ext_tx79(DisasContext *ctx, uint32_t insn);
#endif
+bool decode_ext_vr54xx(DisasContext *ctx, uint32_t insn);
/*
* Helpers for implementing sets of trans_* functions.
diff --git a/target/mips/tcg/vr54xx.decode b/target/mips/tcg/vr54xx.decode
new file mode 100644
index 0000000..f6b3e42
--- /dev/null
+++ b/target/mips/tcg/vr54xx.decode
@@ -0,0 +1,8 @@
+# MIPS VR5432 instruction set extensions
+#
+# Copyright (C) 2021 Philippe Mathieu-Daudé
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+#
+# Reference: VR5432 Microprocessor User’s Manual
+# (Document Number U13751EU5V0UM00)
diff --git a/target/mips/tcg/vr54xx_translate.c b/target/mips/tcg/vr54xx_translate.c
new file mode 100644
index 0000000..13e58fd
--- /dev/null
+++ b/target/mips/tcg/vr54xx_translate.c
@@ -0,0 +1,19 @@
+/*
+ * VR5432 extensions translation routines
+ *
+ * Reference: VR5432 Microprocessor User’s Manual
+ * (Document Number U13751EU5V0UM00)
+ *
+ * Copyright (c) 2021 Philippe Mathieu-Daudé
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "tcg/tcg-op.h"
+#include "exec/helper-gen.h"
+#include "translate.h"
+#include "internal.h"
+
+/* Include the auto-generated decoder. */
+#include "decode-vr54xx.c.inc"