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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-05-04 19:54:57 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-05-19 08:40:50 -0700 |
| commit | c120391c0090d9c40425c92cdb00f38ea8588ff6 (patch) | |
| tree | 57a5bd58a1b4547686c308f2eed8f5f62048a3de /target/mips | |
| parent | b240c9c497b9880ac0ba29465907d5ebecd48083 (diff) | |
| download | qemu-c120391c0090d9c40425c92cdb00f38ea8588ff6.zip qemu-c120391c0090d9c40425c92cdb00f38ea8588ff6.tar.gz qemu-c120391c0090d9c40425c92cdb00f38ea8588ff6.tar.bz2 | |
softfloat: Replace flag with bool
We have had this on the to-do list for quite some time.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/mips')
| -rw-r--r-- | target/mips/msa_helper.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c index 4065cfe..3c7012c 100644 --- a/target/mips/msa_helper.c +++ b/target/mips/msa_helper.c @@ -5508,7 +5508,7 @@ static inline int get_enabled_exceptions(const CPUMIPSState *env, int c) return c & enable; } -static inline float16 float16_from_float32(int32_t a, flag ieee, +static inline float16 float16_from_float32(int32_t a, bool ieee, float_status *status) { float16 f_val; @@ -5527,7 +5527,7 @@ static inline float32 float32_from_float64(int64_t a, float_status *status) return a < 0 ? (f_val | (1 << 31)) : f_val; } -static inline float32 float32_from_float16(int16_t a, flag ieee, +static inline float32 float32_from_float16(int16_t a, bool ieee, float_status *status) { float32 f_val; @@ -6564,7 +6564,7 @@ void helper_msa_fexdo_df(CPUMIPSState *env, uint32_t df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee = 1; + bool ieee = true; MSA_FLOAT_BINOP(Lh(pwx, i), from_float32, pws->w[i], ieee, 16); MSA_FLOAT_BINOP(Rh(pwx, i), from_float32, pwt->w[i], ieee, 16); @@ -7178,7 +7178,7 @@ void helper_msa_fexupl_df(CPUMIPSState *env, uint32_t df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee = 1; + bool ieee = true; MSA_FLOAT_BINOP(pwx->w[i], from_float16, Lh(pws, i), ieee, 32); } @@ -7214,7 +7214,7 @@ void helper_msa_fexupr_df(CPUMIPSState *env, uint32_t df, uint32_t wd, * IEEE and "ARM" format. The latter gains extra exponent * range by omitting the NaN/Inf encodings. */ - flag ieee = 1; + bool ieee = true; MSA_FLOAT_BINOP(pwx->w[i], from_float16, Rh(pws, i), ieee, 32); } |