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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-16 12:06:51 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-01-14 17:13:53 +0100 |
| commit | f395cef7656e794a5c6c007bdf661603410640d8 (patch) | |
| tree | f94e78513a1e74de7946ed1e32e2fcaebcd43b9c /target/mips/mips-defs.h | |
| parent | 08e2262fada2de06232e8099bddf6e03df015c5a (diff) | |
| download | qemu-f395cef7656e794a5c6c007bdf661603410640d8.zip qemu-f395cef7656e794a5c6c007bdf661603410640d8.tar.gz qemu-f395cef7656e794a5c6c007bdf661603410640d8.tar.bz2 | |
target/mips/mips-defs: Use ISA_MIPS32R2 definition to check Release 2
Use the single ISA_MIPS32R2 definition to check if the Release 2
ISA is supported, whether the CPU support 32/64-bit.
For now we keep '32' in the definition name, we will rename it
as ISA_MIPS_R2 in few commits.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-8-f4bug@amsat.org>
Diffstat (limited to 'target/mips/mips-defs.h')
| -rw-r--r-- | target/mips/mips-defs.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index 23ce8b8..b36b59c 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -18,7 +18,6 @@ #define ISA_MIPS5 0x0000000000000010ULL #define ISA_MIPS32 0x0000000000000020ULL #define ISA_MIPS32R2 0x0000000000000040ULL -#define ISA_MIPS64R2 0x0000000000000100ULL #define ISA_MIPS32R3 0x0000000000000200ULL #define ISA_MIPS64R3 0x0000000000000400ULL #define ISA_MIPS32R5 0x0000000000000800ULL @@ -78,7 +77,7 @@ /* MIPS Technologies "Release 2" */ #define CPU_MIPS32R2 (CPU_MIPS32R1 | ISA_MIPS32R2) -#define CPU_MIPS64R2 (CPU_MIPS64R1 | CPU_MIPS32R2 | ISA_MIPS64R2) +#define CPU_MIPS64R2 (CPU_MIPS64R1 | CPU_MIPS32R2) /* MIPS Technologies "Release 3" */ #define CPU_MIPS32R3 (CPU_MIPS32R2 | ISA_MIPS32R3) |