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author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-16 12:34:42 +0100 |
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committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2021-01-14 17:13:53 +0100 |
commit | 2e211e0a12e6cde512b65d25799bb3ac25baa371 (patch) | |
tree | 5f23e2c8af9dec84c6d0c3cc829fc04d65d8ca31 /target/mips/internal.h | |
parent | 5f89ce4fc2afdb81eaed90f337d7016207a2b176 (diff) | |
download | qemu-2e211e0a12e6cde512b65d25799bb3ac25baa371.zip qemu-2e211e0a12e6cde512b65d25799bb3ac25baa371.tar.gz qemu-2e211e0a12e6cde512b65d25799bb3ac25baa371.tar.bz2 |
target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6
The MIPS ISA release 6 is common to 32/64-bit CPUs.
To avoid holes in the insn_flags type, update the
definition with the next available bit.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210104221154.3127610-16-f4bug@amsat.org>
Diffstat (limited to 'target/mips/internal.h')
-rw-r--r-- | target/mips/internal.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/mips/internal.h b/target/mips/internal.h index 23ae31e..77a648b 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -354,7 +354,7 @@ static inline void compute_hflags(CPUMIPSState *env) } else if (((env->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM) && !(env->CP0_Status & (1 << CP0St_UX))) { env->hflags |= MIPS_HFLAG_AWRAP; - } else if (env->insn_flags & ISA_MIPS32R6) { + } else if (env->insn_flags & ISA_MIPS_R6) { /* Address wrapping for Supervisor and Kernel is specified in R6 */ if ((((env->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_SM) && !(env->CP0_Status & (1 << CP0St_SX))) || @@ -365,7 +365,7 @@ static inline void compute_hflags(CPUMIPSState *env) } #endif if (((env->CP0_Status & (1 << CP0St_CU0)) && - !(env->insn_flags & ISA_MIPS32R6)) || + !(env->insn_flags & ISA_MIPS_R6)) || !(env->hflags & MIPS_HFLAG_KSU)) { env->hflags |= MIPS_HFLAG_CP0; } |