diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-11-22 18:05:25 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-12-13 20:27:11 +0100 |
| commit | 3533ee301c46620fd5699cb97f2d4bd194fe0c24 (patch) | |
| tree | e9860d8fcd849ce68f174a74fd82bd019f0d26c9 /target/mips/fpu_helper.c | |
| parent | 98cf80baa75fb8d3d6516e39895247c07a6f83ff (diff) | |
| download | qemu-3533ee301c46620fd5699cb97f2d4bd194fe0c24.zip qemu-3533ee301c46620fd5699cb97f2d4bd194fe0c24.tar.gz qemu-3533ee301c46620fd5699cb97f2d4bd194fe0c24.tar.bz2 | |
target/mips: Use FloatRoundMode enum for FCR31 modes conversion
Use the FloatRoundMode enum type introduced in commit 3dede407cc6
("softfloat: Name rounding mode enum") instead of 'unsigned int'.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20201123204448.3260804-2-f4bug@amsat.org>
Diffstat (limited to 'target/mips/fpu_helper.c')
| -rw-r--r-- | target/mips/fpu_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c index 956e341..bdb6506 100644 --- a/target/mips/fpu_helper.c +++ b/target/mips/fpu_helper.c @@ -38,7 +38,7 @@ #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL /* convert MIPS rounding mode in FCR31 to IEEE library */ -unsigned int ieee_rm[] = { +const FloatRoundMode ieee_rm[4] = { float_round_nearest_even, float_round_to_zero, float_round_up, |