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author | Peter Maydell <peter.maydell@linaro.org> | 2019-06-10 16:09:19 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-06-10 16:09:19 +0100 |
commit | a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (patch) | |
tree | 90697278e6aefd0b91858c403ddb5670f6bdf053 /target/mips/cpu.h | |
parent | 19735c837ae2056b4651720290eda59498eca65a (diff) | |
parent | 43b3952dea0f763ceeaa2f119c473b5cc6d29c90 (diff) | |
download | qemu-a578cdfbdd8f9beff5ced52b7826ddb1669abbbf.zip qemu-a578cdfbdd8f9beff5ced52b7826ddb1669abbbf.tar.gz qemu-a578cdfbdd8f9beff5ced52b7826ddb1669abbbf.tar.bz2 |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190610' into staging
Move softmmu tlb into CPUNegativeOffsetState
# gpg: Signature made Mon 10 Jun 2019 15:07:55 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20190610: (39 commits)
tcg/arm: Remove mostly unreachable tlb special case
tcg/arm: Use LDRD to load tlb mask+table
tcg/aarch64: Use LDP to load tlb mask+table
cpu: Remove CPU_COMMON
cpu: Move the softmmu tlb to CPUNegativeOffsetState
cpu: Move icount_decr to CPUNegativeOffsetState
cpu: Introduce CPUNegativeOffsetState
cpu: Introduce cpu_set_cpustate_pointers
cpu: Move ENV_OFFSET to exec/gen-icount.h
target/xtensa: Use env_cpu, env_archcpu
target/unicore32: Use env_cpu, env_archcpu
target/tricore: Use env_cpu
target/tilegx: Use env_cpu
target/sparc: Use env_cpu, env_archcpu
target/sh4: Use env_cpu, env_archcpu
target/s390x: Use env_cpu, env_archcpu
target/riscv: Use env_cpu, env_archcpu
target/ppc: Use env_cpu, env_archcpu
target/openrisc: Use env_cpu, env_archcpu
target/nios2: Use env_cpu, env_archcpu
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/mips/cpu.h')
-rw-r--r-- | target/mips/cpu.h | 21 |
1 files changed, 5 insertions, 16 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 06a8ed4..bbf1aa8 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -3,18 +3,14 @@ #define ALIGNED_ONLY -#define CPUArchState struct CPUMIPSState - #include "qemu-common.h" #include "cpu-qom.h" -#include "mips-defs.h" #include "exec/cpu-defs.h" #include "fpu/softfloat.h" +#include "mips-defs.h" #define TCG_GUEST_DEFAULT_MO (0) -struct CPUMIPSState; - typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; /* MSA Context */ @@ -103,7 +99,6 @@ struct CPUMIPSFPUContext { #define FP_UNIMPLEMENTED 32 }; -#define NB_MMU_MODES 4 #define TARGET_INSN_START_EXTRA_WORDS 2 typedef struct CPUMIPSMVPContext CPUMIPSMVPContext; @@ -1046,8 +1041,6 @@ struct CPUMIPSState { /* Fields up to this point are cleared by a CPU reset */ struct {} end_reset_fields; - CPU_COMMON - /* Fields from here on are preserved across CPU reset. */ CPUMIPSMVPContext *mvp; #if !defined(CONFIG_USER_ONLY) @@ -1073,17 +1066,10 @@ struct MIPSCPU { CPUState parent_obj; /*< public >*/ + CPUNegativeOffsetState neg; CPUMIPSState env; }; -static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env) -{ - return container_of(env, MIPSCPU, env); -} - -#define ENV_GET_CPU(e) CPU(mips_env_get_cpu(e)) - -#define ENV_OFFSET offsetof(MIPSCPU, env) void mips_cpu_list(void); @@ -1117,6 +1103,9 @@ static inline int cpu_mmu_index(CPUMIPSState *env, bool ifetch) return hflags_mmu_index(env->hflags); } +typedef CPUMIPSState CPUArchState; +typedef MIPSCPU ArchCPU; + #include "exec/cpu-all.h" /* |