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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-05-17 12:51:31 +0200
committerRichard Henderson <richard.henderson@linaro.org>2021-05-26 15:33:59 -0700
commit8b80bd28a5cf8d8af7d38abcf1c7d81a1b226ec3 (patch)
tree3605e96525b415e0d739591836978f4d131c5f4a /target/microblaze
parentc2cf139d9c2f8f8b86686fe0e94a9daba27195a6 (diff)
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cpu: Introduce SysemuCPUOps structure
Introduce a structure to hold handler specific to sysemu. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210517105140.1062037-15-f4bug@amsat.org> [rth: Squash "restrict hw/core/sysemu-cpu-ops.h" patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze')
-rw-r--r--target/microblaze/cpu.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 433ba20..96f221f 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -352,6 +352,13 @@ static ObjectClass *mb_cpu_class_by_name(const char *cpu_model)
return object_class_by_name(TYPE_MICROBLAZE_CPU);
}
+#ifndef CONFIG_USER_ONLY
+#include "hw/core/sysemu-cpu-ops.h"
+
+static const struct SysemuCPUOps mb_sysemu_ops = {
+};
+#endif
+
#include "hw/core/tcg-cpu-ops.h"
static struct TCGCPUOps mb_tcg_ops = {
@@ -388,6 +395,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
#ifndef CONFIG_USER_ONLY
cc->get_phys_page_attrs_debug = mb_cpu_get_phys_page_attrs_debug;
dc->vmsd = &vmstate_mb_cpu;
+ cc->sysemu_ops = &mb_sysemu_ops;
#endif
device_class_set_props(dc, mb_properties);
cc->gdb_num_core_regs = 32 + 27;