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authorRichard Henderson <richard.henderson@linaro.org>2020-08-19 16:12:12 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-09-01 07:41:38 -0700
commit2c32179f39278ebc975c3d08710bb22672911889 (patch)
tree36abf62ac6708a3d2a0d2cd6bb79597d10ec4604 /target/microblaze/translate.c
parent3986c650a25e645a2b39795e5004d7e0e1c7b8b1 (diff)
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target/microblaze: Replace MSR_EE_FLAG with MSR_EE
There's no reason to define MSR_EE_FLAG; we can just use the original MSR_EE define. Document the other flags copied into tb_flags with iflag to reserve those bits. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze/translate.c')
-rw-r--r--target/microblaze/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 7254190..1f6731e 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -162,7 +162,7 @@ static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest)
*/
static bool trap_illegal(DisasContext *dc, bool cond)
{
- if (cond && (dc->tb_flags & MSR_EE_FLAG)
+ if (cond && (dc->tb_flags & MSR_EE)
&& dc->cpu->cfg.illegal_opcode_exception) {
gen_raise_hw_excp(dc, ESR_EC_ILLEGAL_OP);
}
@@ -178,7 +178,7 @@ static bool trap_userspace(DisasContext *dc, bool cond)
int mem_index = cpu_mmu_index(&dc->cpu->env, false);
bool cond_user = cond && mem_index == MMU_USER_IDX;
- if (cond_user && (dc->tb_flags & MSR_EE_FLAG)) {
+ if (cond_user && (dc->tb_flags & MSR_EE)) {
gen_raise_hw_excp(dc, ESR_EC_PRIVINSN);
}
return cond_user;