Merge remote-tracking branch 'remotes/rth/tags/pull-mb-20200907-2' into staging

Use lookup_and_goto_tb.
Cleanup and fill in VMStateDescription.

# gpg: Signature made Mon 07 Sep 2020 21:01:55 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-mb-20200907-2:
  configure: Do not set TARGET_ABI32 for microblaze
  target/microblaze: Put MicroBlazeCPUConfig into DisasContext
  target/microblaze: Fill in VMStateDescription for cpu
  target/microblaze: Move mmu parameters to MicroBlazeCPUConfig
  target/microblaze: Treat pvr_regs as constant
  target/microblaze: Move pvr regs to MicroBlazeCPUConfig
  target/microblaze: Reorg MicroBlazeCPUConfig to minimize holes
  target/microblaze: Split out MicroBlazeCPUConfig
  target/microblaze: Diagnose invalid insns in delay slots
  target/microblaze: Use tcg_gen_lookup_and_goto_ptr
  target/microblaze: Force rtid, rted, rtbd to exit
  target/microblaze: Handle DISAS_EXIT_NEXT in delay slot
  target/microblaze: Replace cpustate_changed with DISAS_EXIT_NEXT
  target/microblaze: Introduce DISAS_EXIT_NEXT, DISAS_EXIT_JUMP
  target/microblaze: Rename DISAS_UPDATE to DISAS_EXIT
  target/microblaze: Rename mmu structs
  target/microblaze: Cleanup mb_cpu_do_interrupt
  target/microblaze: Renumber D_FLAG

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

1 files changed, 6 insertions, 14 deletions

diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h
index 75e5301..7d0fbb8 100644
--- a/target/microblaze/mmu.h
+++ b/target/microblaze/mmu.h
@@ -63,23 +63,16 @@
 
 #define TLB_ENTRIES    64
 
-struct microblaze_mmu
-{
+typedef struct {
     /* Data and tag brams.  */
     uint64_t rams[2][TLB_ENTRIES];
     /* We keep a separate ram for the tids to avoid the 48 bit tag width.  */
     uint8_t tids[TLB_ENTRIES];
     /* Control flops.  */
     uint32_t regs[3];
+} MicroBlazeMMU;
 
-    int c_mmu;
-    int c_mmu_tlb_access;
-    int c_mmu_zones;
-    uint64_t c_addr_mask; /* Mask to apply to physical addresses.  */
-};
-
-struct microblaze_mmu_lookup
-{
+typedef struct {
     uint32_t paddr;
     uint32_t vaddr;
     unsigned int size;
@@ -88,13 +81,12 @@ struct microblaze_mmu_lookup
     enum {
         ERR_PROT, ERR_MISS, ERR_HIT
     } err;
-};
+} MicroBlazeMMULookup;
 
-unsigned int mmu_translate(struct microblaze_mmu *mmu,
-                           struct microblaze_mmu_lookup *lu,
+unsigned int mmu_translate(MicroBlazeCPU *cpu, MicroBlazeMMULookup *lu,
                            target_ulong vaddr, int rw, int mmu_idx);
 uint32_t mmu_read(CPUMBState *env, bool ea, uint32_t rn);
 void mmu_write(CPUMBState *env, bool ea, uint32_t rn, uint32_t v);
-void mmu_init(struct microblaze_mmu *mmu);
+void mmu_init(MicroBlazeMMU *mmu);
 
 #endif