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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-22 18:27:36 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-06-10 07:03:42 -0700 |
| commit | f5c7e93ad9880accbc6ecba3a77d7ac849c57eba (patch) | |
| tree | 75a6261784152464954aa8f0ff780de36596340e /target/microblaze/mmu.c | |
| parent | a8d92fd869c601f723b82d9736a2d78ae640b8a2 (diff) | |
| download | qemu-f5c7e93ad9880accbc6ecba3a77d7ac849c57eba.zip qemu-f5c7e93ad9880accbc6ecba3a77d7ac849c57eba.tar.gz qemu-f5c7e93ad9880accbc6ecba3a77d7ac849c57eba.tar.bz2 | |
target/microblaze: Use env_cpu, env_archcpu
Cleanup in the boilerplate that each target must define.
Replace mb_env_get_cpu with env_archcpu. The combination
CPU(mb_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Move cpu_mmu_index below the include of "exec/cpu-all.h",
so that the definition of env_archcpu is available.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'target/microblaze/mmu.c')
| -rw-r--r-- | target/microblaze/mmu.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c index fcf86b1..6763421 100644 --- a/target/microblaze/mmu.c +++ b/target/microblaze/mmu.c @@ -34,7 +34,7 @@ static unsigned int tlb_decode_size(unsigned int f) static void mmu_flush_idx(CPUMBState *env, unsigned int idx) { - CPUState *cs = CPU(mb_env_get_cpu(env)); + CPUState *cs = env_cpu(env); struct microblaze_mmu *mmu = &env->mmu; unsigned int tlb_size; uint32_t tlb_tag, end, t; @@ -228,7 +228,6 @@ uint32_t mmu_read(CPUMBState *env, bool ext, uint32_t rn) void mmu_write(CPUMBState *env, bool ext, uint32_t rn, uint32_t v) { - MicroBlazeCPU *cpu = mb_env_get_cpu(env); uint64_t tmp64; unsigned int i; qemu_log_mask(CPU_LOG_MMU, @@ -269,7 +268,7 @@ void mmu_write(CPUMBState *env, bool ext, uint32_t rn, uint32_t v) /* Changes to the zone protection reg flush the QEMU TLB. Fortunately, these are very uncommon. */ if (v != env->mmu.regs[rn]) { - tlb_flush(CPU(cpu)); + tlb_flush(env_cpu(env)); } env->mmu.regs[rn] = v; break; |