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author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2018-04-13 22:04:37 +0200 |
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committer | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2018-05-29 09:35:14 +0200 |
commit | d248e1beac9a640c033cc7d3c3d494576a74bbc0 (patch) | |
tree | 5003538cfadc3c9418e739b179e36ba15387a8a3 /target/microblaze/cpu.h | |
parent | be73ef6423fbe1f06c912a67d6d066d257c11e18 (diff) | |
download | qemu-d248e1beac9a640c033cc7d3c3d494576a74bbc0.zip qemu-d248e1beac9a640c033cc7d3c3d494576a74bbc0.tar.gz qemu-d248e1beac9a640c033cc7d3c3d494576a74bbc0.tar.bz2 |
target-microblaze: Add Extended Addressing
Add support for Extended Addressing. Load/stores with EA
enabled concatenate two 32bit registers to form an extended
address.
We don't allow users to enable address sizes larger than
32 bits quite yet though. Once the MMU support is in, we'll
turn it on.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/cpu.h')
-rw-r--r-- | target/microblaze/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index b631b7d..e62c456 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -203,6 +203,7 @@ typedef struct CPUMBState CPUMBState; /* Target family PVR mask */ #define PVR10_TARGET_FAMILY_MASK 0xFF000000 +#define PVR10_ASIZE_SHIFT 18 /* MMU descrtiption */ #define PVR11_USE_MMU 0xC0000000 @@ -297,6 +298,7 @@ struct MicroBlazeCPU { struct { bool stackprot; uint32_t base_vectors; + uint8_t addr_size; uint8_t use_fpu; uint8_t use_hw_mul; bool use_barrel; |