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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-04-13 20:20:25 +0200
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2018-05-29 09:35:13 +0200
commit403322ea6c383b3337fe3c52d9ed84958f94bcd1 (patch)
tree455dbf0f67b6de1c6eb1514a49eca1ca213809cd /target/microblaze/cpu.h
parent0a87e691b3924d5e3964dd1b77eb88b000dd4126 (diff)
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target-microblaze: Use TCGv for load/store addresses
Use TCGv for load/store addresses, allowing for future computation of 64-bit load/store address. No functional change. Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/cpu.h')
-rw-r--r--target/microblaze/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 2304c24..1593496 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -250,7 +250,7 @@ struct CPUMBState {
/* lwx/swx reserved address */
#define RES_ADDR_NONE 0xffffffff /* Use 0xffffffff to indicate no reservation */
- uint32_t res_addr;
+ target_ulong res_addr;
uint32_t res_val;
/* Internal flags. */