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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2019-10-30 13:55:08 +0100
committerEdgar E. Iglesias <edgar.iglesias@xilinx.com>2020-04-30 12:11:03 +0200
commit5143fdf36f78bd4c11c4bacedfdbd44365aa5781 (patch)
tree9ad252430e121a83f7814e7a6b2d2431a3cb2f7e /target/microblaze/cpu.c
parent1ee1bd28fcce858e6f51d2d1d6ef9048bc254b86 (diff)
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target/microblaze: Add the ill-opcode-exception property
Add the ill-opcode-exception property to control if illegal instructions will raise exceptions. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target/microblaze/cpu.c')
-rw-r--r--target/microblaze/cpu.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 418a0cd..2cc6b15 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -207,6 +207,8 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
PVR2_DOPB_BUS_EXC_MASK : 0) |
(cpu->cfg.iopb_bus_exception ?
PVR2_IOPB_BUS_EXC_MASK : 0) |
+ (cpu->cfg.illegal_opcode_exception ?
+ PVR2_ILL_OPCODE_EXC_MASK : 0) |
(cpu->cfg.opcode_0_illegal ?
PVR2_OPCODE_0x0_ILL_MASK : 0);
@@ -276,6 +278,8 @@ static Property mb_properties[] = {
/* Enables bus exceptions on failed instruction fetches. */
DEFINE_PROP_BOOL("iopb-bus-exception", MicroBlazeCPU,
cfg.iopb_bus_exception, false),
+ DEFINE_PROP_BOOL("ill-opcode-exception", MicroBlazeCPU,
+ cfg.illegal_opcode_exception, false),
DEFINE_PROP_BOOL("opcode-0x0-illegal", MicroBlazeCPU,
cfg.opcode_0_illegal, false),
DEFINE_PROP_STRING("version", MicroBlazeCPU, cfg.version),