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authorLaurent Vivier <laurent@vivier.eu>2017-06-28 22:42:40 +0200
committerLaurent Vivier <laurent@vivier.eu>2017-06-29 20:29:00 +0200
commit77bdb2292492fafc4bc0fbb4d8c44fdd0ef1fa8e (patch)
treec6ca7c82c19b06f8cf6f805dc7bf51558e76a08f /target/m68k
parent2f77995cebc8027851b8ea8f02c097fb8cdf668a (diff)
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target/m68k: add explicit single and double precision operations (part 2)
Add fsabs, fdabs, fsneg, fdneg, fsmove and fdmove. The value is converted using the new floatx80_round() function. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170628204241.32106-7-laurent@vivier.eu>
Diffstat (limited to 'target/m68k')
-rw-r--r--target/m68k/fpu_helper.c48
-rw-r--r--target/m68k/helper.h8
-rw-r--r--target/m68k/translate.c26
3 files changed, 74 insertions, 8 deletions
diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c
index 600ae8a..382fbc1 100644
--- a/target/m68k/fpu_helper.c
+++ b/target/m68k/fpu_helper.c
@@ -167,6 +167,20 @@ void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val)
set_floatx80_rounding_precision(old, &env->fp_status); \
} while (0)
+void HELPER(fsround)(CPUM68KState *env, FPReg *res, FPReg *val)
+{
+ PREC_BEGIN(32);
+ res->d = floatx80_round(val->d, &env->fp_status);
+ PREC_END();
+}
+
+void HELPER(fdround)(CPUM68KState *env, FPReg *res, FPReg *val)
+{
+ PREC_BEGIN(64);
+ res->d = floatx80_round(val->d, &env->fp_status);
+ PREC_END();
+}
+
void HELPER(fsqrt)(CPUM68KState *env, FPReg *res, FPReg *val)
{
res->d = floatx80_sqrt(val->d, &env->fp_status);
@@ -188,12 +202,40 @@ void HELPER(fdsqrt)(CPUM68KState *env, FPReg *res, FPReg *val)
void HELPER(fabs)(CPUM68KState *env, FPReg *res, FPReg *val)
{
- res->d = floatx80_abs(val->d);
+ res->d = floatx80_round(floatx80_abs(val->d), &env->fp_status);
+}
+
+void HELPER(fsabs)(CPUM68KState *env, FPReg *res, FPReg *val)
+{
+ PREC_BEGIN(32);
+ res->d = floatx80_round(floatx80_abs(val->d), &env->fp_status);
+ PREC_END();
+}
+
+void HELPER(fdabs)(CPUM68KState *env, FPReg *res, FPReg *val)
+{
+ PREC_BEGIN(64);
+ res->d = floatx80_round(floatx80_abs(val->d), &env->fp_status);
+ PREC_END();
+}
+
+void HELPER(fneg)(CPUM68KState *env, FPReg *res, FPReg *val)
+{
+ res->d = floatx80_round(floatx80_chs(val->d), &env->fp_status);
}
-void HELPER(fchs)(CPUM68KState *env, FPReg *res, FPReg *val)
+void HELPER(fsneg)(CPUM68KState *env, FPReg *res, FPReg *val)
{
- res->d = floatx80_chs(val->d);
+ PREC_BEGIN(32);
+ res->d = floatx80_round(floatx80_chs(val->d), &env->fp_status);
+ PREC_END();
+}
+
+void HELPER(fdneg)(CPUM68KState *env, FPReg *res, FPReg *val)
+{
+ PREC_BEGIN(64);
+ res->d = floatx80_round(floatx80_chs(val->d), &env->fp_status);
+ PREC_END();
}
void HELPER(fadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
diff --git a/target/m68k/helper.h b/target/m68k/helper.h
index f05191b..b396899 100644
--- a/target/m68k/helper.h
+++ b/target/m68k/helper.h
@@ -23,13 +23,19 @@ DEF_HELPER_2(redf32, f32, env, fp)
DEF_HELPER_2(redf64, f64, env, fp)
DEF_HELPER_2(reds32, s32, env, fp)
+DEF_HELPER_3(fsround, void, env, fp, fp)
+DEF_HELPER_3(fdround, void, env, fp, fp)
DEF_HELPER_3(firound, void, env, fp, fp)
DEF_HELPER_3(fitrunc, void, env, fp, fp)
DEF_HELPER_3(fsqrt, void, env, fp, fp)
DEF_HELPER_3(fssqrt, void, env, fp, fp)
DEF_HELPER_3(fdsqrt, void, env, fp, fp)
DEF_HELPER_3(fabs, void, env, fp, fp)
-DEF_HELPER_3(fchs, void, env, fp, fp)
+DEF_HELPER_3(fsabs, void, env, fp, fp)
+DEF_HELPER_3(fdabs, void, env, fp, fp)
+DEF_HELPER_3(fneg, void, env, fp, fp)
+DEF_HELPER_3(fsneg, void, env, fp, fp)
+DEF_HELPER_3(fdneg, void, env, fp, fp)
DEF_HELPER_4(fadd, void, env, fp, fp, fp)
DEF_HELPER_4(fsadd, void, env, fp, fp, fp)
DEF_HELPER_4(fdadd, void, env, fp, fp, fp)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 72c45de..89ac2c7 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4595,9 +4595,15 @@ DISAS_INSN(fpu)
}
cpu_dest = gen_fp_ptr(REG(ext, 7));
switch (opmode) {
- case 0: case 0x40: case 0x44: /* fmove */
+ case 0: /* fmove */
gen_fp_move(cpu_dest, cpu_src);
break;
+ case 0x40: /* fsmove */
+ gen_helper_fsround(cpu_env, cpu_dest, cpu_src);
+ break;
+ case 0x44: /* fdmove */
+ gen_helper_fdround(cpu_env, cpu_dest, cpu_src);
+ break;
case 1: /* fint */
gen_helper_firound(cpu_env, cpu_dest, cpu_src);
break;
@@ -4613,11 +4619,23 @@ DISAS_INSN(fpu)
case 0x45: /* fdsqrt */
gen_helper_fdsqrt(cpu_env, cpu_dest, cpu_src);
break;
- case 0x18: case 0x58: case 0x5c: /* fabs */
+ case 0x18: /* fabs */
gen_helper_fabs(cpu_env, cpu_dest, cpu_src);
break;
- case 0x1a: case 0x5a: case 0x5e: /* fneg */
- gen_helper_fchs(cpu_env, cpu_dest, cpu_src);
+ case 0x58: /* fsabs */
+ gen_helper_fsabs(cpu_env, cpu_dest, cpu_src);
+ break;
+ case 0x5c: /* fdabs */
+ gen_helper_fdabs(cpu_env, cpu_dest, cpu_src);
+ break;
+ case 0x1a: /* fneg */
+ gen_helper_fneg(cpu_env, cpu_dest, cpu_src);
+ break;
+ case 0x5a: /* fsneg */
+ gen_helper_fsneg(cpu_env, cpu_dest, cpu_src);
+ break;
+ case 0x5e: /* fdneg */
+ gen_helper_fdneg(cpu_env, cpu_dest, cpu_src);
break;
case 0x20: /* fdiv */
gen_helper_fdiv(cpu_env, cpu_dest, cpu_src, cpu_dest);